File name 40374.pdfINTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
· The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC · The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF40374B MSI Octal D-type flip-flop with 3-state outputs
Product specification File under Integrated Circuits, IC04 January 1995
Philips Semiconductors
Product specification
Octal D-type flip-flop with 3-state outputs
DESCRIPTION The HEF40374B is an octal D-type flip-flop with 3-state buffered outputs with a common clock input (CP). The device is used primarily as an 8-bit positive edge-triggered storage register for interfacing with a 3-state bus. Data on the D-inputs is transferred to storage during the LOW-to-HIGH transition of the clock (CP) input. The 3-state output buffers are controlled by an active LOW output enable input (EO). A HIGH on EO forces the eight outputs to a high impedance OFF-state. When EO is LOW, the data in the register appears at the outputs.
HEF40374B MSI
The output stages have high current output capability suitable for driving highly capacitive loads. The device features hysteresis on the CP input to improve noise rejection. Schmitt-trigger action in the E input makes the circuit highly tolerant to slower input rise and fall times. The HEF40374B is pin and functionally compatible with the TTL `374' device. Supply voltage range: 3 to 15 V.
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
PINNING HEF40374BP(N): 20-lead DIL; plastic (SOT146-1) HEF40374BD(F): HEF40374BT(D): 20-lead DIL; ceramic (cerdip) (SOT152) 20-lead SO; plastic (SOT163-1) D0 to D7 CP EO O0 to O7 data inputs clock input output enable input (active LOW) 3-state buffered outputs
( ): Package Designator North America FAMILY DATA, IDD LIMITS category MSI See Family Specifications
January 1995
2
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Octal D-type flip-flop with 3-state outputs HEF40374B MSI
Product specification
Philips Semiconductors
Product specification
Octal D-type flip-flop with 3-state outputs
FUNCTION TABLE INPUTS OPERATING MODES EO L load & read register L H load register & disable outputs Notes 1. H = HIGH state (the more positive voltage) h = HIGH state (one set-up time prior to the LOW-to-HIGH clock transition) L = LOW state (the less positive voltage) I = LOW state (one set-up time prior to the LOW-to-HIGH clock transition) Z = high impedance OFF-state = LOW-to-HIGH clock transition H CP Dn I h I h INTERNAL REGISTER L H L H
HEF40374B MSI
OUTPUTS O0 TO O7 L H |