Agilent Frequency Domain Analysis of Jitter Amplification in Clock Channels 5991-1255EN [4] free download

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Frequency Domain Analysis of Jitter Amplification in Clock Channels Fangyi Rao Sammy Hindi Agilent Technologies, Inc. Juniper Networks Santa Clara, CA Sunnyvale, CA [email protected] [email protected] Abstract--Clock channel jitter amplification factor in terms of where 0 is the fundamental frequency of the clock signal, 0 a transfer function or S-parameters is derived. Amplification is constant phase offset, and the phase modulation that shown to arise from smaller attenuation in jitter lower sideband represents jitter. When is small Eq. 1 can be linearized. than in the fundamental. Amplification scaling with loss is obtained analytically. A v in (t ) [exp( j 0 t j 0 ) j (t ) exp( j 0 t j 0 ) (2) Index Terms--jitter, amplification, loss. 2 exp( j 0 t j 0 ) j (t ) exp( j 0 t j 0 )] I. INTRODUCTION High speed interconnect performance is increasingly Consider a sinusoidal jitter at frequency . influenced by jitter as data rate advances. The amount of jitter is modulated by channel dispersion as signals propagate in the (t ) ( ) exp( j t ) ( ) * exp( j t ) (3) system. It is observed in both measurements and simulations that jitter can be amplified by a lossy channel even when the Substitution of Eq. 3 into Eq. 2 yields channel is linear, passive and noiseless [1]-[4]. The mechanism A of jitter amplification is discussed in terms of channel v in {exp( j 0 t j 0 ) impulse/step response in [2]-[4]. In particular, duty-cycle- 2 distortion (DCD) and random jitter (RJ) amplification