Nokia 9902S free download

File name 9902_schematic.pdf

EXTDATA(0:31) PAL_A_V(0:2) UARTDO(0:5) OSD PAL SYNC BLOCK FRONTEND BLOCK FRONTEND_SCL FRONTEND_SDA EB_CLK403 FRONTEND_C1 FRONTEND_C2 PAL_DVB RF_A_MONO RF_CVBS CH3:4 BG_L-NORM TUNE_IN RESET_DMA LNB_IN(0:1) HSDI_SIG(0:8) HSDI_DATA(0:7) MDO_EC(0:10) EB_EXTINT(0:2) MDO_EC(0:10) PAL_A_V(0:2) HVSYNC(0:1) 1 2 HOST2 BLOCK EB_CLK402 READ_STROBE CD1 CD2 MOD_RESET_A MDI_EC(0:10) IRQ-RDY1 IRQ-RDY2 +3.3V_SEP GND_SEP LNB_LARM DISEQ UARTDO(0:5) O_E INT_VER MDO_EC(0:10) MOD_RESET_B HSDI_SIG(0:8) HSDI_DATA(0:7) HSDI_STATUS(0:1) Sheet 10 (F) 3-5 16-31 0-1 4,6 1,2 GENERAL_IO(0:5) IIC(0:1) EXTDATA(0:31) EXTADDR(0:24) EB_OUT(0:2) CHIP_SELECT(0:6) JTAG_M_OUT(0:2) TDO RESET CLK_27 UARTDI(0:5) JTAG_M_TDO_M Sheet 5 (C) TDO SC_CONTROL(0:7) UARTDI(0:5) 0 JTAG_M_OUT(0:2) SC_CONTROL(0:7) 1 24-31 1,2 EB_EXTINT(0:2) 0 MDI_EC(0:10) EXTWAIT1 PAL_A_V(0:2) HVSYNC(0:1) PAL_DVB Sheet 11 (G) VCO_CNT O_E INT_VER AUDIO/VIDEO BLOCK CH3:4 FRONTEND_C1 FRONTEND_C2 FRONTEND_SCL LATCH_CONTROL2 LATCH_CONTROL3 FRONTEND_SDA CA_5V_CTRL PAL_DVB RF_A_MONO RF_CVBS VREF_TRIM AUDIO_OUT(0:4) RGB_OUT(0:2) BG_L-NORM TUNE_IN RESET_DMA PAL_A_V(0:2) DESCRAMBLER BLOCK SMARTCARD_OUT(0:4) EB_CLK401 CA_5V_CTRL MDI_EC(0:10) EXTWAIT1 CHIP_SELECT(0:6) RESET EXTDATA(0:31) EXTADDR(0:24) EB_OUT(0:2) IIC_2(0:1) READ_STROBE CD1 CD2 MOD_RESET_A IRQ_RDY1 IRQ_RDY2 LATCH_CONTROL2 LATCH_CONTROL3 SAT_SW_WR RGB_OUT(0:2) MDO(0:10) EB_EXTINT(0:2) EB_IN(0:3) LATCH_CONTROL MDO(0:10) 2 0 AUDIO_OUT(0:4) STD_BY Sheet 6 (B) SMARTCARD BLOCK SMARTCARD_OUT(0:4) SC_CONTROL(0:7) SMARTCARD_SCDATAIO SMART_C_3.3_5V UARTDO(0:5) SMARTCARD_IN(0:2) UARTDI(0:5) 1,2 PCMCLK FBLK_IN REMOTECONTROL_SIRCSO THIS DRAWING IS PROPERTY OF SCI DESIGN CENTER AND MUST NOT BE COPIED OR SHOWN OR GIVEN TO THIRD PERSON. VIOLATION OF THESE STIPULATIONS WILL BE SUBJECT TO LEGAL MEASURES ACCORDING TO EXISTING LAW. HSDI_STATUS(0:1) 3 GENERAL_IO(0:5) IIC(0:1) MOD_RESET_B COMPOUT_CVBS RESET 1,2,3 24-31 EXTADDR(0:24) EXTDATA(0:31) IIC(0:1) IIC_2(0:1) Sheet 7 (A) PROCESSOR BLOCK SMARTCARD_IN(0:2) SMARTCARD_SCDATAIO REMOTECONTROL_SIRCSO PCMCLK MDO(0:10) UARTDI(0:5) GENERAL_IO(0:5) IIC(0:1) RGB_OUT(0:2) IIC_2(0:1) RESET AUDIO_OUT(0:4) UARTDO(0:5) UART1_CK16 SMARTCARD_OUT(0:4) GENERAL_IO(0:5) IIC(0:1) Sheet 4 (D) RESET HSDI_DATA(0:7) HSDI_SIG(0:8) HSDI_DATA(0:7) HSDI_SIG(0:8) HSDI_STATUS(0:1) FBLK_IN HSDI_STATUS(0:1) EXTDATA(0:31) EXTADDR(0:24) EXTADDR(0:24) EB_EXTINT(0:2) EB_EXTINT(0:2) EB_IN(0:3) EB_IN(0:3) COMPOUT_CVBS EB_OUT(0:2) CHIP_SELECT(0:6) EB_CLK401 EB_CLK402 EB_CLK403 JTAG_M_OUT(0:2) EB_DRAMOUT(0:4) JTAG_S_IN(0:3) JTAG_S_IN(0:3) SDATA(0:15) JTAG_S_TDO_S 24 SDRAM_CONTROL(0:8) SADDR(0:11) JTAG_S_IN(0:3) CLK_27 VREF_TRIM VCO_CNT SMART_C_3.3_5V MOD_RESET_B 1284_LEVEL HVSYNC(0:1) Sheet 2 (P) STDBY 1 0-2 EXTDATA(0:31) EXTADDR(0:24) RESET SAT_SW_WR STD_BY IIC_2(0:1) EB_OUT(0:2) CHIP_SELECT(0:6) HOST CONTROL BLOCK LATCH_CONTROL JTAG_M_TDO_M POWER BLOCK +5V_OP +12V_OP +3,3V_OP +2,5V +3,3V +5V +6V +12V +33V +23V +3.3V_SEP GND_SEP LNB_LARM DISEQ