Agilent Tips and Advanced Techniques for Characterizing a 28 Gb s Transceiver 5991-4085EN c20140919 [31] free download

File name Tips and Advanced Techniques for Characterizing a 28 Gb s Transceiver 5991-4085EN c20140919 [31].pdf

Keysight Technologies Tips and Advanced Techniques for Characterizing a 28 Gb/s Transceiver White Paper DesignCon 2013 Introduction With the increased use of data services, the performance demand at every level of the network is increasing. Just a few years ago, the state of the art was 11 Gigabits per second (Gb/s) serial channel data transmission. New standards such as OTU4 and 100 GbE, now require greater rates of data throughput, while at the same time demanding lower power and a smaller physical footprint. These new standards now call for transceiver rates in excess of 25Gb/s per channel. As a result of this demand, engineers must now design, develop and validate boards and systems that have multiple 28Gb/s transceiver channels1. With transceivers running at these rates, the entire serial transmission and measurement eco-system is challenged. The serial transmission channel must be designed to support these significantly greater bandwidths. Additionally, the task of designing, developing, qualifying and validat- ing the physical hardware layer must adapt to these new challenges. Not only does this mean that the test equipment hardware must be able to support the increased bandwidth and dynamic range, but now the instrument software must also be able to remove the unwanted effects of the interconnecting structures between the DUT and the test equipment input ports. Xilinx has manufactured and assembled a printed circuit board test vehicle for the purpose of demonstrating and characterizing the aforementioned advanced FPGA with the 28 Gb/s transceivers. Although great care was taken in the design and fab- rication of the board, there is still some degradation in the signal between the launch point at the device package pins and the board connectors. For a user to effectively evaluate the transceiver, they must be able to view the original signal as it appears at the package pin. Attempting to probe the signal at the package pin is not possible because the vias at the package pin are back drilled and are not readily accessible through traditional probing techniques. Even if one could access the pins at the package pin vias, the probe itself would create even more problems by disturbing the signal integrity of the channel through the observer effect. The effects of the interconnection between the test equipment and the DUT can no longer be ignored as risetimes drop to 15pS ( ~2mm electrical length on a PCB) for a 28 Gb/s data rate and the corresponding transmission bandwidth jumps to 33 GHz. In complex systems, there is impairment on the connecting fixture channel caused by package ballout, board vias and traces, connectors, and cables. Since the channel transfer function acts like a low pass filter, it is critical to be able to isolate one segment at a time and optimize the path for the targeted frequency range. The ability to de-embed the interconnecting fixture channel requires up-front d