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File name: | sda9x89x_B31_2pd.rar [preview sda9x89x] |
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Model: | sda9x89x 🔎 |
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Descr: | datasheet |
Group: | Electronics > Components > Integrated circuits |
Uploaded: | 19-04-2007 |
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File name sda9x89x_B31_2pd.pdf PRELIMINARY DATA SHEET SDA 9489X PIP IV Advanced SDA 9589X SOPHISTICUS Version B31 High-End Picture-In-Picture ICs Edition Dec. 14, 2001 6251-562-2PD SDA 9489X (B31) SDA 9589X (B31) Preliminary Data Sheet High-end Picture-In-Picture (PIP) ICs Version 2.3 General Description SDA 9489X 'PIP IV Advanced' and SDA 9589X 'SOPHISTICUS' belong to a new generation of Picturein-Picture (PiP) processors that combine high-quality digital PIP signal processing, digital multistandard color decoding and AD/DA conversion on a single chip. Both devices are equipped with CVBS and Y/C input interfaces. In addition the SDA SDA 9589X is also able to process YUV input signals for displaying high quality video signals e.g. coming from a DVD source. CMOS SOIC28-1 Figure 0-1 Picture-In-Picture The integrated digital color decoder is able to decode all analog TV standards (PAL, NTSC and SECAM) and detects the standard automatically. Therefore the IC is suited for world-wide use. A picture reduction from 1/4 to 1/81 of original size selectable in fine steps is possible. The transfer functions of the decimation filters are optimally matched to the selected picture size reduction and can furthermore be adjusted to the viewer's requirements by a selectable peaking. A maximum of 324 luminance and 2x81 chrominance pixels per line are stored in the memory. The PiP supports split-screen applications as well as multi-PiP display. Type SDA 9489X SDA 9589X Micronas Package SOIC28-1 SOIC28-1 -2 SDA 9489X (B31) SDA 9589X (B31) Preliminary Data Sheet 1 2 3 4 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.2 4.3 4.4 4.5 4.6 4.6.1 4.6.2 4.6.3 4.6.4 4.6.5 4.6.6 4.7 4.7.1 4.7.2 4.7.3 4.7.4 4.7.5 4.8 4.8.1 4.8.2 4.8.3 4.8.4 4.8.5 4.8.6 4.8.7 4.9 4.9.1 4.9.2 4.9.3 4.10 4.10.1 4.10.2 Micronas Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Analog Frontend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Input Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 AD-Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Automatic Gain Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Signal Magnitudes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Inset Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Chroma Decoding And Standard Identification . . . . . . . . . . . . . . . . . . . . . .13 Comb Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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