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File name TDA1771.pdf

TDA1771 VERTICAL DEFLECTION CIRCUIT s s s s s s s RAMP GENERATOR INDEPENDENT AMPLITUDE ADJUSTEMENT BUFFER STAGE POWER AMPLIFIER FLYBACK GENERATOR INTERNAL REFERENCE VOLTAGE THERMAL PROTECTION SIP10 (Plastic Package) Figure 1. PIN CONNECTIONS (Top View) 10 9 8 7 6 5 4 3 2 1 FLYBACK GENERATOR VS INVERTING INPUT BUFFER OUTPUT RAMP GENERATOR GROUND HEIGHT ADJUSTMENT TRIGGER INPUT OUTPUT STAGE V S POWER OUTPUT DESCRIPTION The TDA1771 is a monolithic integrated circuit in SIP10 package. It is a full performance and very efficient vertical deflection circuit intended for direct drive of a TV picture tube in Color and B & W television as well as in Monitor and Data displays. Figure 2. BLOCK DIAGRAM 9 2 VOLTAGE REGULATOR FLYBACK GENERATOR 10 R3 TRIGGER IN 3 RAMP GENERATOR CLOCK PULSE POWER AMP. 1 BUFFER STAGE THERMAL PROTECTION 4 6 7 8 5 September 2003 This is preliminary information on a new product now in development. Details are subject to change without notice. 1/5 1 TDA1771 ABSOLUTE MAXIMUM RATINGS Symbol VS V1,V2 V3 V8 I0 I0 I10 I10 Ptot TS,TJ Parameter Supply Voltage Flyback Peak Voltage Trigger Input Voltage Amplifier Input Voltage Output Peak to Peak Current (non repetitive t = 2ms) Output Peak to Peak Current t > 10µs Pin 10 DC Current at V1 < V9 Pin 10 Peak to Peak Current @ tfly < 1.5ms Total Power Dissipation @ Ttab = 60°C Storage and Junction Temperature Value 30 65 20 GNDtoVS 6 4 100 3 9 - 40, + 150 Unit V V V V A A mA A W °C THERMAL DATA Symbol Rth (j-tab) Rth (j-a) Parameter+ Thermal Resistance Junction-tab Thermal Resistance Junction-ambient Max. Max. Value 10 70 Unit °C/W °C/W ELECTRICAL CHARACTERISTICS (Tamb = 25°C unless otherwise specified) Symbol DC(VS=30V) I2 I9 -I6 -I6 dI6/I6 V1 V1L V1H V4 dV4/VS dV4/dI4 Vr Gv Vfs V10 V3 I3 t3 Parameter Pin 2 Quiescent Current Pin 9 Quiescent Current Ramp Generator Bias Current Ramp Generator Current Ramp Gener. Linearity Quiescent Output Voltage Out Saturation Voltage to GND Out Saturation Voltage to VS Reference Voltage Reference Voltage Drift Versus Reference Voltage Drift Versus Internal Ref. Voltage Ouput Stage Open Loop Gain V9 - 10 Saturation Voltage Pin 10 Scanning Voltage Trigger Input Threshold Trigger Input Bias Current Trigger Input Width TestConditions I1 = 0, I10 = 0 I1 = 0, I10 = 0 V6 = 0 V6 = 0, - I4 = 20µA V6 = 0 to 15V, - I4 = 20µA Ra = 30k, Rb = 10k, VS = 30V Ra = 6.8k, Rb = 10k, VS = 15V I1 = 0.5A I1 = 1.2A - I1 = 0.5A - I1 = 1.2A - I4 = 20µA VS = 10V to 30V I4 = 10µA to 30µA f = 100Hz - I10 = 1.2A I10 = 20mA (see note 1) VIN = V3 - 0.2V (see note 2) Min. Typ. Max. 36 30 0.5 18.5 20 21.5 0.2 1 17.0 17.8 18.6 7.2 7.5 7.8 0.5 1 1 1.4 1.1 1.6 1.6 2.2 6.3 6.6 6.9 1 2 1.5 2 4.26 4.40 4.54 60 1.5 2.5 1.7 3 2.6 3.0 3.4 30 20 60 th 16 15 Unit mA mA µA µA % V V V V V V V mV/V mV/µA V dB V V V µA µS VS I4 Notes: 1. The trigger input circuit can accept, with a metal option, positive and negative going pulses. 2. th = 1.2 t S where tS is the vertical period and