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INTEGRATED CIRCUITS DATA SHEET TDA837x family I2C-bus controlled economy PAL/NTSC and NTSC TV-processors Preliminary specification File under Integrated Circuits, IC02 1997 Jul 01 Philips Semiconductors Preliminary specification I2C-bus controlled economy PAL/NTSC and NTSC TV-processors FEATURES Available in all ICs: · Vision IF amplifier with high sensitivity and good figures for differential phase and gain · PLL demodulator for the IF signal · Alignment-free sound demodulator · Flexible source selection with a CVBS input for the internal signal and Y/C or CVBS input for the external signal · Audio switch · The output signal of the CVBS (Y/C) switch is externally available · Integrated chrominance trap and band-pass filters (auto-calibrated) · Luminance delay line integrated · A symmetrical peaking circuit in the luminance channel · Black stretching of non-standard CVBS or luminance signals · RGB control circuit with black current stabilization and white point adjustment · Linear RGB inputs and fast blanking · Horizontal synchronization with two control loops and alignment-free horizontal oscillator · Slow start and slow stop of the horizontal drive pulses · Vertical count-down circuit · Vertical driver optimized for DC-coupled vertical output stages · I2C-bus control of various functions · Low dissipation · Small amount of peripheral components compared with competition ICs. Table 1 TV receiver versions SDIP56 PACKAGE TV RECEIVERS ECONOMY PAL only PAL/NTSC (SECAM) NTSC TDA8374B TDA8374 and TDA8374A TDA8373 MID/HIGH END - TDA8375 and TDA8375A TDA8377 and TDA8377A GENERAL DESCRIPTION TDA837x family The various versions of the TDA837x series are I2C-bus controlled single-chip TV processors which are intended to be applied in PAL/NTSC (TDA8374 and TDA8375) and NTSC (TDA8373 and TDA8377) television receivers. All ICs are available in an SDIP56 package and some versions are also available in a QFP64 package. The ICs are pin compatible so that with one application board NTSC and PAL/NTSC (or multistandard together with the SECAM decoder TDA8395) receivers can be built. Functionally this IC series is split in to 2 categories: · Versions intended to be used in economy TV receivers with all basic functions · Versions with additional functions such as E-W geometry control, horizontal and vertical zoom function and YUV interface which are intended for TV receivers with 110° picture tubes. The various type numbers are given in Table 1. The detailed differences between the various ICs are given in Table 2. QFP64 PACKAGE ECONOMY TDA8374BH TDA8374AH - MID/HIGH END - TDA8375AH - 1997 Jul 01 2 Philips Semiconductors Preliminary specification I2C-bus controlled economy PAL/NTSC and NTSC TV-processors Table 2 Differences between the various ICs IC VERSION (TDA) CIRCUITS 8373 Multistandard IF Automatic Volume Levelling (AVL) PAL decoder SECAM interface NTSC decoder Colour matrix PAL/NTSC (Japan) Colour matrix NTSC (USA/Japan) YUV interface Horizontal g