Acer 7740G free download

File name 09293-1 ACER 7740G.pdf

5 4 3 2 1 JV70-CP Block Diagram D Project code: 91.4GC01.001 PCB P/N : 48.4GC01.011 REVISION : 09293--1 ATi PCI EXPRESS GRAPHIC PCB STACKUP TOP VCC S Clock Generator ICS9LRS3197AKLFT SLG8SP585VTR 3 DDRIII Slot 0 20 800/1066/1333 DDRIII Slot 1 21 800/1066/1333 DDRII Channel A Arrandale Clarksfield 4,5,..,9,10 Intel CPU X16 Madison Park LVDS 2CH RGB CRT VRAM sDDR3 1Gb*8 64...67 S GND BOTTOM D 58...63 DDR II Channel B DMIx4 FDIx8 Digital Display SYSTEM DC/DC TPS51123 CRT INPUTS 24 5V_S5 DCBATOUT 3D3V_S5 23 47 INTEL Mini-Card WLAN 37 C PCH RGB CRT Switch Switch Switch OUTPUTS PCIE+USB 2.0 PCH 14 USB 2.0/1.1 ports ETHERNET (10/100/1000Mb) High Definition Audio PCH LVDS 2CH LCD WXGA+ SYSTEM DC/DC TPS51117 INPUTS DCBATOUT PCH Digital Display HDMI25 OUTPUTS 1D5V_S3 48 C RJ45 CONN Giga LAN 31 BCM57780 30 PCIE 6 SATA ports 8 PCIE ports ACPI 1.1 LPC I/F PCI/PCI BRIDGE USB 2.0 WEBCAM SYSTEM DC/DC 23 TPS51117 INPUTS OUTPUTS 1D05V_S0 48 LINE IN MIC IN INT MIC HD AUDIO CODEC ALC669X 32 BLUETOOTH 28 USB x 4 Card Reader AU6433 36 30 DCBATOUT AZALIA SYSTEM DC/DC TPS51117 INPUTS OUTPUTS 1D05V_VTT 49 B SD/MMC MS/MS Pro/xD 36 DCBATOUT B CPU DC/DC OP AMP 2CH SPEAKER MAX 9789C 33 11,12,...,18,19 SPI Flash ROM 4MB 41 ISL62883 INPUTS DCBATOUT OUTPUTS VCC_CORE 45,46 LINE OUT LPC Bus LPC debug 40 MAXIM CHARGER ISL88731A INPUTS OUTPUTS BT+ 51 MODEM RJ11 MDC CARD KBC NPCE781B 39 35 SPI USB BD 09582-1 29 FP Base BD 09587-1 41 DCBATOUT A SATA HDD 26 SATA Thermal Sensor G787 38 Touch PAD 41 Int. KB39 Flash ROM 128KB 40 JV70-CP A Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title SATA ODD 27 Block Diagram Size A3 Date: Document Number Rev JV70-CP Thursday, October 08, 2009 Sheet 1 -1 1 of 68 5 4 3 2 PCH Strapping Name SPKR A B Schematics Notes Processor Strapping Pin Name CFG[4] C D Default Value 1 E Strap Description Embedded DisplayPort Presence PCI-Express Static Lane Reversal PCI-Express Configuration Select Reserved Temporarily used for early Clarksfield samples. Reboot option at power-up Default Mode: Internal weak Pull-down. No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k - 10-k weak pull-up resistor. Weak internal pull-down. Do not pull high. Default Mode: Internal pull-up. Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k pull-down resistor). Configuration (Default value for each bit is 1 unless specified otherwise) 1: Disabled - No Physical Display Port attached to Embedded DisplayPort. 0: Enabled - An external Display Port device is connected to the Embedded Display Port. 1: Normal Operation. 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ... 1: Single PCI-Express Graphics 0: Bifurcation enabled Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor Note: Only temporary for early CFD samples (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a comm