File name 90S1200.PDFAT90S1200
Features
· · · · · · · · · · · · · · · · · ·
Utilizes the AVR ® Enhanced RISC Architecture AVR - High Performance and Low Power RISC Architecture 89 Powerful Instructions - Most Single Clock Cycle Execution 1K bytes of In-System Reprogrammable Downloadable Flash - SPI Serial Interface for Program Downloading - Endurance: 1,000 Write/Erase Cycles 64 bytes EEPROM - Endurance: 100,000 Write/Erase Cycles 32 x 8 General Purpose Working Registers 15 Programmable I/O Lines VCC: 2.7 - 6.0V Fully Static Operation, 0 - 16 MHz Instruction Cycle Time: 62.5 ns @ 16 MHz One 8-Bit Timer/Counter with Separate Prescaler External and Internal Interrupt Sources Programmable Watchdog Timer with On-Chip Oscillator On-Chip Analog Comparator Low Power Idle and Power Down Modes Programming Lock for Software Security 20-Pin Device Selectable On-Chip RC Oscillator for Zero External Components
8-Bit Microcontroller with 1K bytes Downloadable Flash AT90S1200
Description
The AT90S1200 is a low-power CMOS 8-bit microcontroller based on the AVR ® enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90S1200 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with the 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
(continued)
Pin Configuration
0838A
2-3
Block Diagram
Figure 1. The AT90S1200 Block Diagram
2-4
AT90S1200
AT90S1200
Description (Continued)
The architecture supports high level languages efficiently as well as extremely dense assembler code programs. The AT90S1200 provides the following features: 1K bytes of Downloadable Flash, 64 bytes EEPROM, 15 general purpose I/O lines, 32 general purpose working registers, internal and external interrupts, programmable Watchdog Timer with internal oscillator, an SPI serial port for program downloading and two software selectable power saving modes. The Idle Mode stops the CPU while allowing the registers, timer/counter, watchdog and interrupt system to continue functioning. The power down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next external interrupt or hardware reset. The device is manufactured using Atmel's high density non-volatile memory technology. The on-chip Downloadable Flash allows the program memory to be reprogrammed in-system through an SPI serial interface or by a conventional nonvolatile memory programmer. By combining an enhanced RISC 8-bit CPU with Downloadable Flash on a monolithic chip, the Atmel AT90S1200 is a powerful microcontroller that provides a |