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File name: | R25-1495_1401_Instruction_Logic_Nov60.pdf [preview R25-1495 1401 Instruction Logic Nov60] |
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Model: | R25-1495 1401 Instruction Logic Nov60 🔎 |
Original: | R25-1495 1401 Instruction Logic Nov60 🔎 |
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File name R25-1495_1401_Instruction_Logic_Nov60.pdf IB'4 1401 DATA PROCESSING SYSTEM INSTRUCTION LOGIC Thomas M. Mierswa Eastern Region Systems Dept. November 1960 TABLE OF CONTENTS Introduction 3 Data Flow 5 Control 8 Instructions: I-Phase 10 Instructions: E-Phase 22 Common A- cycle 23 Set Word Mark 24 Clear Word Mark 24 Move 27 Move Zone 27 Move Digit 27 Load 30 Clear Storage 32 Compare 34 Move & Zero Suppress 36 Edit 39 Reset Add 46 Reset Subtract 47 Add 49 Subtract 49 True Add 54 Complement Add 58 Branch 68 T est and Branch 68 T est Character and Branch 72 Test Zone or WM and Branch 72 No Operation 74 Stop 74 Read 76 Punch 82 Print 88 Checking Features 95 INTRODUCTION The purpose of these notes is to provide a simplified version of 1401 machine logic for IBM Field Systems personnel. A knowledge of these principles will aid in understanding more fully the functions that each instruction causes the machine to perform. This knowledge, it is hoped, will also stimulate ideas for better programming which will both reduce machine time and conserve memory space. These notes were compiled from the Customer Engineering Manual and from the Logic Flow Diagrams used by Customer Engineers. No effort has been made to present the exact sequence of events within a machine cycle because a knowledge of partial cycle operation would be of no practical knowledge to the Field Systems Representative. Only the instructions in the basic 1401 card system are presented. In the diagrams and figures included in these notes the following abbreviations are used: A-REG A-Register A-STAR A-Storage Address Register B-REG B-Register B-STAR B-Storage Address Register C.B. Circuit breaker Character - All bits including check bit, zone bits, digit bits and WM bit C.L. Console light Digit The l, 2, 4, 8 bits and C- bit as required E-Phase The machine cycles required to execute an instruction I-OP Instruction Operation cycle during which the instr |
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