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TTL-to-CMOS or CMOS-to-CMOS Operation
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CD4504BMS
December 1992
CMOS Hex Voltage Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation
Pinout
CD4504BMS TOP VIEW
Features
· High Voltage Type (20V Rating) · Independence of Power Supply Sequence Considerations - VCC can Exceed VDD - Input Signals can Exceed Both VCC and VDD · Up and Down Level Shifting Capability · Shiftable Input Threshold for Either CMOS or TTL Compatibility · 100% Tested for Quiescent Current at 20V · 5V, 10V and 15V Parametric Ratings · Standardized Symmetrical Output Characteristics · Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC · Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices"
VCC
1
16 VDD 15 FOUT 14 FIN 13 SELECT 12 EOUT 11 EIN 10 DOUT 9 DIN
AOUT 2 AIN BOUT BIN COUT CIN VSS 3 4 5 6 7 8
Functional Diagram
VCC VDD LEVEL SHIFTER OUT (2, 4, 6, 10, 12, 15)
Description
CD4504BMS hex voltage level shifter consists of six circuits which shift input signals from the VCC logic level to the VDD logic level. To shift TTL signals to CMOS logic levels, the SELECT input is at the VCC HIGH logic state. When the SELECT input is at a LOW logic state, each circuit translates signals from one CMOS level to another. The CD4504BMS is supplied in these 16-lead outline packages: Frit Seal DIP Ceramic Flatpack H1F H6W * IN
(3, 5, 7, 9, 11, 14)
SELECT
*
13
TTL/CMOS MODE SELECT
VCC = PIN 1 VDD = PIN 16 VSS = PIN 8
VDD
*
ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK
VSS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
File Number
3336
7-1140
Specifications CD4504BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . . ja jc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 4.5V, VCC = 2.8, VIN = VDD or GND VDD = 4.5V, VCC = 3.0, VIN = VDD or GND VDD = 18V, VCC = 18V, VIN = GND or VCC VDD = 18V, VCC = 4.5V, VIN = VCC or GND VDD = 4.5V, VCC = 18V, VIN = VCC or GND VDD = 20V, VCC = 20V, VIN = GND or VCC VDD = 20V, VCC = 4.5V, VIN = VCC or GND VDD = 4.5V, VCC = 20V, VIN = VCC or GND 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 8B 8A 8A 8A 7 7 7 LIMITS TEMPERATURE +25
oC
PARAMETER Supply Current
SYMBOL IDD
CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND
MIN -100 -1000 -100 -
MAX 2 200 2 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8
UNITS µA µA µA nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V
+125oC -55oC +25o C
+125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC
+25oC, +125oC, -55oC 14.95 +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC -55oC +125oC +125oC +125oC +25oC +25oC +25oC 0.53 1.4 3.5 -2.8 0.7
VOH > VOL < VDD/2 VDD/2
7-1141
Specifications CD4504BMS
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) GROUP A SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC MIN 2 3.5 7 MAX 0.8 1.5 3 UNITS V V V V V V
PARAMETER Input Voltage Low (Note 2) TTL-CMOS Input Voltage High (Note 2) TTL-CMOS Input Voltage Low (Note 2) CMOS-CMOS Input Voltage High (Note 2)CMOS-CMOS Input Voltage Low (Note 2) CMOS-CMOS Input Voltage High (Note 2) CMOS-CMOS
SYMBOL VIL VIH VIL VIH VIL VIH
CONDITIONS (NOTE 1) VDD = 15V, VOH > 13.5V, VOL < 1V VCC = 5V VDD = 15V, VOH > 13.5V, VOL < 1V VCC = 5V VDD = 10V, VOH > 9V, VOL < 1V VCC = 5V VDD = 10V, VOH > 9V, VOL < 1V VCC = 5V VDD = 15V, VOH > 13.5V, VOL < 1.5V, VCC = 10V VDD = 15V, VOH > 13.5V, VOL < 1.5V, VCC = 10V
NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 +25oC +125oC, -55oC LIMITS MIN MAX 280 378 240 324 550 743 280 378 240 324 400 540 200 270 UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns
PARAMETER Propagation Delay TTL to CMOS VDD > VCC Propagation Delay CMOS to CMOS VDD > VCC Propagation Delay CMOS to CMOS VCC > VDD Propagation Delay TTL to CMOS VDD > VCC Propagation Delay CMOS to CMOS VDD > VCC Propagation Delay CMOS to CMOS VCC > VDD Transition Time
SYMBOL TPHL1
CONDITIONS (NOTE 1, 2) VDD = 10V, VIN = VCC or GND VCC = 5V VDD = 10V, VIN = VCC or GND VCC = 5V VDD = 5V, VIN = VCC or GND VCC = 10V VDD = 10V, VIN = VCC or GND VCC = 5V VDD = 10V, VIN = VCC or GND VCC = 5V VDD = 5V, VIN = VCC or GND VCC = 10V All Modes
TPHL2
+25oC +125oC, -55oC
TPHL3
+25oC +125oC, -55oC +25oC +125oC, -55oC
TPLH1
TPLH2
+25oC +125oC, -55oC
TPLH3
+25oC +125oC, -55oC
TTHL TTLH
+25oC +125oC, -55oC
NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
7-1142
Specifications CD4504BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC +125oC VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC MIN 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 2 3.5 MAX 1 30 2 60 2 120 50 50 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 -2.4 -4.2 0.8 1.5 280 240 140 550 140 280 UNITS µA µA µA µA µA µA mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA V V V V ns ns ns ns ns ns
+125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC -55oC Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC -55oC Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55oC Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC -55oC Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC -55oC Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC -55oC Input Voltage Low TTL - CMOS Input Voltage High TTL - CMOS Input Voltage Low CMOS - CMOS Input Voltage High CMOS - CMOS Propagation Delay TTL - CMOS, VDD > VCC Propagation Delay CMOS - CMOS, VDD > VCC Propagation Delay CMOS - CMOS, VCC > VDD Propagation Delay TTL - CMOS, VDD > VCC VIL VIH VIL VIH TPHL1 TPHL2 VDD = 10V, VOH > 9V, VOL < 1V, VCC = 5V VDD = 10V, VOH > 9V, VOL < 1V, VCC = 5V VDD = 15V, VOH > 13.5V, VOL < 1.5V, VCC = 5V VDD = 15V, VOH > 13.5V, VOL < 1.5V, VCC = 5V VDD = 15V, VCC = 5V VDD = 15V, VCC = 5V VDD = 15V, VCC = 10V TPHL3 VDD = 5V, VCC = 15V VDD = 10V, VCC = 15V TPLH1 VDD = 15V, VCC = 5V 1, 2 1, 2 1, 2 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25oC +25oC +25oC +25oC
7-1143
Specifications CD4504BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Propagation Delay CMOS - CMOS, VDD > VCC Propagation Delay CMOS - CMOS VCC > VDD Transition Time SYMBOL TPLH2 CONDITIONS VDD = 15V, VCC = 5V VDD = 15V, VCC = 10V TPLH3 VDD = 5V, VCC = 15V VDD = 10V, VCC = 15V TTHL TTLH CIN VDD = 10V VDD = 15V Any Input NOTES 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 TEMPERATURE +25oC +25oC +25oC +25 C +25oC +25oC +25oC
o
MIN -
MAX 240 140 400 120 100 80 7.5
UNITS ns ns ns ns ns ns pF
Input Capacitance NOTES:
1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH VTN VTP VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10µA VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC MIN -2.8 0.2 VOH > VDD/2 MAX 7.5 -0.2 ±1 2.8 ±1 VOL < VDD/2 1.35 x +25oC Limit UNITS µA V V V V V
ns
NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25oC limit. 4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER Supply Current - MSI-1 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A ± 0.2µA ± 20% x Pre-Test Reading ± 20% x Pre-Test Reading DELTA LIMIT
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A
7-1144
Specifications CD4504BMS
TABLE 6. APPLICABLE SUBGROUPS (Continued) CONFORMANCE GROUP Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 READ AND RECORD IDD, IOL5, IOH5A
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4
CONFORMANCE GROUPS Group E Subgroup 2
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic BurnIn (Note 1, 3) Irradiation (Note 2) NOTES: 1. Each pin except VCC, VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VCC, VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V 3. Oscillator output to be VDD/2. OPEN 2, 4, 6, 10, 12, 15 2, 4, 6, 10, 12, 15 2, 4, 6, 10, 12, 15 GROUND 3, 5, 7-9, 11, 14 8 8 8 VDD 16 16 16 1, 3, 5, 7, 9, 11, 13, 14, 16 9V ± -0.5V 1, 13 1, 3, 5, 7, 9, 11, 13, 14 1, 2, 4, 6, 10, 12, 15 3, 5, 7, 9, 11, 14 50kHz 25kHz
7-1145
CD4504BMS Typical Performance Characteristics
1/6 OUTPUT LOW (SINK) CURRENT (IOL) (mA) 1/6 OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC
30 25 20 15 10 5
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V
10V
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 1. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 2. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5
0
0 -5 -10 -15
0
0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
-10V
-20 -25
-10V
-10
-15V
-30
-15V
-15
FIGURE 3. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
INPUT SWITCHING VOLTAGE (VSWITCH) (V) AMBIENT TEMPERATURE (TA) = +25oC VCC 10 8 6 4 2 0 2.5 5 7.5 10 VOUT VSS ENABLE = VCC VCC = 10V 50% VIN VSS VDD
FIGURE 4. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
INPUT SWITCHING VOLTAGE (VSWITCH) (V) *VSWITCH = INPUT VOLTAGE AT WHICH OUTPUT LEVEL IS 50% OF VDD - VSS 10 VIN 8 6 4 2 0 2.5 AMBIENT TEMPERATURE (TA) = +25oC 5 7.5 10 12.5 15 17.5 20 SUPPLY VOLTAGE (VDD) (V) VSS VDD VOUT VSS ENABLE = VCC 50% VCC
*VSWITCH
VCC = 15V
*VSWITCH
VCC = 5V
*VSWITCH = INPUT VOLTAGE AT WHICH OUTPUT LEVEL IS 50% OF VDD - VSS 12.5 15 17.5 20
SUPPLY VOLTAGE (VDD) (V)
FIGURE 5. TYPICAL INPUT SWITCHING AS A FUNCTION OF HIGH LEVEL SUPPLY VOLTAGE (SELECT AT VCC-CMOS MODE)
FIGURE 6. TYPICAL INPUT SWITCHING AS A FUNCTION OF HIGH LEVEL SUPPLY VOLTAGE (SELECT AT VSS-TTL MODE)
7-1146
CD4504BMS Typical Performance Characteristics
(Continued)
SUPPLY VOLTAGE (VDD) (V)
25 20 15 10 5
AMBIENT TEMPERATURE (TA) = +25oC CMOS MODE = RECOMMENDED OPERATING CONDITIONS TTL MODE =
0
5
10 15 20 25 SUPPLY VOLTAGE (VCC) (V)
FIGURE 7. HIGH LEVEL SUPPLY VOLTAGE vs LOW LEVEL SUPPLY VOLTAGE
Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch).
METALLIZATION: PASSIVATION:
Thickness: 11kÅ - 14kÅ,
AL.
10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
1147