Text preview for : P60NF06.pdf part of Computer power supply MosFet
DESCRIPTION
This Power Mosfet series realized with STMicroelectronics
unique STripFET process has specifically
been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters for Telecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
INTERNAL SCHEMATIC DIAGRAM
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STP60NF06 STP60NF06FP
N-CHANNEL 60V - 0.014 - 60A TO-220/TO-220FP STripFETTM POWER MOSFET
TYPE STP60NF06 STP60NF06FP
s s s s
VDSS 60 V 60 V
RDS(on) < 0.016 < 0.016
ID 60A 60A
TYPICAL RDS(on) = 0.014 EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION TO-220
3 1 2
1 2
3
TO-220FP
DESCRIPTION This Power Mosfet series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high-efficiency isolated DC-DC converters for Telecom and Computer application. It is also intended for any application with low gate charge drive requirements. APPLICATIONS s HIGH-EFFICIENCY DC-DC CONVERTERS s UPS AND MOTOR CONTROL s AUTOMOTIVE
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM (l) PTOT dv/dt (1) VISO Tstg Tj January 2002 Parameter STP60NF06 Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Insulation Winthstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature -65 to 175
(1) I SD 60A, di/dt400 A/µs, VDD 24V, TjTjMAX
Value STP60NF06FP 60 60 ± 20 60 42 240 110 0.73 4 2500 37 26 148 42 0.28
Unit V V V A A A W W/°C V/ns V °C
(q) Pulse width limited by safe operating area
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THERMAL DATA
TO-220 Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max 1.36 62.5 300 TO-220FP 3.57 °C/W °C/W °C
Maximum Lead Temperature For Soldering Purpose
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 30 V) Max Value 30 360 Unit A mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 °C VGS = ± 20V Min. 60 1 10 ±100 Typ. Max. Unit V µA µA nA
ON (1)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250µA VGS = 10V, ID = 30 A Min. 2 0.014 Typ. Max. 4 0.016 Unit V
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS =15V , ID = 30 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 20 1810 360 125 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 30 V, ID = 30 A RG = 4.7 VGS = 10V (see test circuit, Figure 3) VDD = 48V, ID =60A,VGS = 10V Min. Typ. 16 108 49 18 14 66 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf td(off) tf tc Parameter Turn-off-Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 30 V, ID = 30 A, RG = 4.7, VGS = 10V (see test circuit, Figure 3) Vclamp =48V, ID = 60 A RG = 4.7, VGS = 10V (see test circuit, Figure 3) Min. Typ. 43 20 40 12 21 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 60 A, VGS = 0 ISD = 60 A, di/dt = 100A/µs, VDD = 25V, Tj = 150°C (see test circuit, Figure 5) 73 182 5 Test Conditions Min. Typ. Max. 60 240 1.3 Unit A A V ns nC A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area for TO-220
Safe Operating Area for TO-220FP
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Thermal Impedence for TO-220 Thermal Impedence for TO-220FP
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
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Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized Gate Threshold Voltage vs Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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TO-220 MECHANICAL DATA
DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 4.40 1.23 2.40 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 0.645 0.551 0.116 0.620 0.260 0.154 0.151 mm TYP. MAX. 4.60 1.32 2.72 MIN. 0.173 0.048 0.094 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 inch TYP. MAX. 0.181 0.051 0.107
A
C
D1
L2
D
F1
G1
E
Dia. L5 L7 L6 L4
P011C
L9
F2
F
G
H2
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TO-220FP MECHANICAL DATA
mm. MIN. 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 28.6 9.8 2.9 15.9 9 3 30.6 10.6 3.6 16.4 9.3 3.2 1.126 .0385 0.114 0.626 0.354 0.118 TYP MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.141 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409
DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 Ø
A
B
L3 L6 L7
F1
D
F
G1 H
F2
L2 L5
E
1 2 3
L4
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G
STP60NF06 - STP60NF06FP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2001 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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