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158 Tuner/IF Main Tuner Overview The MM101 tuner continues to employ TOB (Tuner On Board) topography with a zinc tuner wrap. It is a single conversion, electronically aligned tuner essentially identical to the CTC195/197 tuner. There will be two variations: 1) A single input tuner 2) A single input tuner with PIP RF output The second tuner is not based on the CTC 197 but is a "cold" version of the CTC 185 tuner. There are many similarities between the two. Refer to the Second Tuner/IF section of this manual for a further description of the circuitry. Changes made initially for the MM101 include use of a dedicated Tuner EEPROM (U32601) and Main IF DAC (Digital to Analog Converter) IC, U32602. The RF splitter is identical to the CTC197 splitter developed to improve main tuner performance while allowing an increase in signal level to the PIP tuner. The tuner can be separated into three distinct sections for discussion. First, the RF stage which processes the incoming antenna or cable RF signal. This stage captures, filters and amplifies the RF for further processing. Next, the mixer/oscillator converts the different high frequency RF carriers to a single IF frequency for use by the remainder of the television circuitry. The PLL IC controls the RF and mixer/oscillator switching and tuning circuits. The PLL communicates with the main microprocessor for channel selection information, then converts the digital information to analog voltages needed to tune the RF and mixer/oscillator to the proper frequency.
RF Stage RF AMP RF INPUT RF BANDPASS
Mixer/Oscillator Stage
MIXER
IF OUT
AGC
OSCILLATOR
PLL
Figure 11-1, Tuner Block Diagram
Tuner/IF 159 Input Splitter The input splitter feeds the RF input signal to both the main and PIP tuners. The splitter consists of asymmetrical power divider transformer T25801 and broadband amplifier Q25801 and its associated circuitry. The arrangement minimizes loss in the main RF path at the expense of higher loss in the PIP tuner path, thus optimizing noise figure of the more important main tuner. Remember that the main tuner always supplies the signal for the main picture. During PIP operation, if the PIP and Main pictures are "swapped", the main tuner retunes to the PIP channel and the PIP tuner retunes to the main channel. Broadband amplifier Q25801 amplifies the PIP RF path signal, compensating for the loss in transformer T25801.
+12Vs
L25802 C25806 1000 PIP RF Q25801
R25807 12 6 PIP OUT MAIN 3 OUT GND 4 MAIN RF
T25801 RF IN C25801 1000 1
Figure 11-2, Main/PIP RF Splitter
Tuner Power Supply The MM101 contains a separate tuner and IF DAC supply with voltages derived directly from the standby or main supply and others derived from a dual voltage regulator IC. The supplies are: +33Vif +33Vt -12Vt +12Vt +5Vt +12Vdac +9Vif +5Vdac
160 Tuner/IF Dual Voltage Regulator Two voltages are taken directly from the standby supply; +33Vs and -12Vs. They are decoupled to prevent transfer of noise between the tuner/IF and the supplies. The IF and tuner +33V supplies are also decoupled from each other to prevent unwanted interference. The remainder of the tuner/IF supplies are generated from the +15Vs supply by a single IC dual-voltage regulator, U32605. The supply is switched off by the +12Vr supply during standby operation to avoid load on the +15Vs supply. The supply uses the inputs on pins 1 and 2 to supply a regulated +12V from pin 6 and a +5V output from pin 7. The +12Vt supply is further regulated down to +9V for the IF circuits. It is also used to provide a +12Vdac supply for the IF DAC, U32602. The +12Vdac supply is used to generate a +5.1Vdac supply used by the IF DAC outputs. This becomes the maximum supply available for the DAC outputs. The main +5Vt supply is used by various tuner and IF circuits. The dual-voltage regulator is turned on and off as needed. Pins 3 and 5 are enable inputs normally used to control the two outputs separately. In this case, they are strapped together so that the outputs are either both on or both off. When the enable inputs are high, the output current at the regulated voltages are available. When they are low, both outputs are shut off. The +5Vs supply is used as the enable switch voltage. It is controlled via Q14604 by the +12Vr supply. When the +12Vr supply comes up, Q14604 turns on and +5Vs is applied to the enable pins of U32605. This activates the IC and it begins supplying output current.
+33Vif +33Vs
L25201
+33Vt -12Vt
L25203 R32696 8.2
-12Vs
1
IN 1
Output 2
6 R32679 10
+12Vt
+15Vs
R32695 51
2
IN 2
Q14604
R32697 1000
3
Enable Output 2 Enable Output 1
U32605 Dual-Voltage Regulator
+9Vif
CR32605 10V 7
+5Vs
5 Output 1
+5Vt
R32606 10 CR32606 5.1V
+12Vr
R14625 220
4
+12Vdac
R32638 5100
+5.1Vdac
Figure 11-3, Tuner Power Supply
Tuner/IF 161 Input Filtering The main RF input from the input splitter is fed to a diplexer which routes the VHF and UHF range signals to the single-tuned tracking filters of the VHF and UHF RF amplifiers, respectively. The single-tuned filters are voltage tuned tank circuits tuned to the selected channel by voltages generated from DAC's on PLL synthesizer IC, U25501. The filters reject signals from unwanted frequencies, reducing intermodulation distortion and minimizing image response. Referring to Figure 11-5, the PLL IC, U25501, controls the frequency response curve of the input filter by using output voltages from pins 6 and 14 to change the characteristics of the single-tuned input filter tank circuit and shaping the response of the appropriate RF amplifier. While pin 6 is a variable DAC output voltage, pin 14 is either a high or low voltage depending upon the selected band. The chart in Figure 11-4, shows the voltage selection for the different RF bands and channels. The chart is a representation of tuning voltages for off-air channel selection. Notice that as channel selection goes up through the VHF, then the UHF bands, the tuning voltage on pin 6 rises until the first UHF channel selection (14). At that point, the band switching on pin 14 goes from high to low and the DAC output voltages go down and begin the tuning cycle again, increasing as the channel selection goes up the band. This becomes the beginning of the tuning cycle.
Channel 2 6 7 13 14 69 U25501 Pin 6 U25501 Pin 14 (Single-tuned Filter) (Band Switching) 1.2 V 7.6 V 4.5 V 6.9 V 5.1 V 25.4 V HIGH HIGH HIGH HIGH LOW LOW
Figure 11-4, Input Band Filter Switching Chart RF Amplifier The MM101 uses a single-stage dual-gate depletion type FET (Field Effect Transistor). FET's are used in the first RF amplifier to provide the highest gain and lowest noise. These FET's are voltage controlled devices that operate very similar to vacuum tubes. When negative voltage is applied to the gate with respect to the source, drain current is reduced. If the negative voltage is high enough, drain current is pinched off completely. Positive voltage on the gate with respect to the source will increase drain current. Both gates on the dual-gate MOSFET's affect drain current. In this chassis, the RF input is on gate 1 and the AGC (Automatic Gain Control) is placed on gate 2. As the AGC voltage increases (positive with respect to the source) drain current also increases. When AGC voltage decreases drain current decreases. The AGC voltage is generated from the Video IF IC, U32603-10, which monitors the IF signal level. If the IF signal level increases, AGC voltage is reduced, lowering the gain of the RF amplifier. If the IF signal decreases, AGC voltage increases raising the gain of the RF amplifier.
162 Tuner/IF
RF IN
T25801 Main/PIP Splitter
RF to PIP 4
UHF RF Amp
U25701 VHF/UHF MIXER/OSC
16 17
UHF OSC UHF Mixer
UHF Single Tuned UHF/VHF Splitter VHF Single Tuned
18 19
Double-Tuned PRI/SEC
UHF Tank Circuit CR25701
5
12 6
VHF RF Amp
Double-Tuned PRI/SEC
13
VHF Mixer VHF OSC
7
14 15
VHF Tank Circuit CR25702 CR25703
-12Vs
R25512 100K
+12Vs
1 6 ST 14 BS1 BV/U 7 PRI 8 SEC L01 L02 10 11 15 2 11
LO Amp
+12Vs
R25511 100K Q25503
R25606 47
9
10
R25510 100K
U25501 PLL
43 C IIC 44 D 3 13 C
Run 1
BSX 18 19
Q25601
IF Filters VC1 VC2
R25610 0.5
1 12 5 6
To SAW Filter & U32603-5/6 Video IF
C D
Ref Ref Bias
D
U13101 System Control
U13203 MUX
D C U32601 TUNER EEPROM
BS1/2 17 Loop Filter 5 3
C25507 0.1 R25504 12K
1
2
Y25501 4 MHz R25503 12K
14 4
15
C U32602 IIC IF DAC 3 D
Figure 11-5, Main Tuner Block Diagram Double-Tuned Tracking Filter The double-tuned filter is essentially an air-core balun transformer with voltage tuned primary and secondary. The bottom of the primary is returned to ground, whereas the secondary is balanced for driving the balanced mixer inputs of mixer/oscillator IC, U25701. The double-tuned tracking filter increases selectivity provided by the singletuned tracking filter. The VHF double-tuned tracking filter is split in two bands and bandswitched with PIN diodes. The UHF double-tuned tracking filter is not bandswitched. Transformers provide impedance matching for the remainder of the RF stage. Mixer/Oscillator U25701 comprises a self-contained mixer/oscillator network requiring very few external components. The IC contains two double-balanced mixers and two balanced voltage controlled oscillators (VCO), one for VHF, one for UHF, plus bandswitching logic. The VCO tank circuits are external to the IC and contain varactor diodes for tuning, and PIN diodes for bandswitching of the VHF VCO section. As in the case of the tracking filters, the UHF VCO is not bandswitched. The balanced output of the mixer/oscillator feeds the nominal 45 MHz IF signal to the SAW preamp. This IF is then sent to the Video IF IC, U32603-5/6 for further processing. The video and audio IF signals are separated at that time.
Tuner/IF 163 SAW Preamp The SAW preamp receives the balanced mixer IF output from the mixer/oscillator IC, U25701 and bandpass filters and amplifies the IF signal for application to the IF SAW (Surface Acoustic Wave) IF filter located just outside the tuner enclosure. At the saw preamp input is a double-tuned transformer which rejects unwanted mixer products and further augments the selectivity provided by the tracking filters in the tuner front end. The double-tuned transformer primary is balanced, and is tuned by a varactor diode which obtains its tuning voltage from DAC IC, U32602. The secondary is similarly tuned, and has one side grounded to feed the unbalanced input of Q25601, which develops a suitable low impedance drive for the SAW filter. The entire stage is electronically aligned by use of varactor diodes. PLL Frequency Synthesizer The PLL frequency synthesizer IC, U25501, controls the frequency of the VCO's in the mixer/oscillator IC, U25701, producing the desired local oscillator frequency for the tuner. The PLL section is of conventional design, consisting of two programmable frequency dividers, a reference oscillator with external crystal, a phase detector and error amplifier. Figure 11-6 shows a simplified block diagram of the PLL section in the IC. A reference divider chain divides the output of the 4 MHz crystal reference oscillator to produce a PLL reference frequency of 7.8125 KHz for application to one input of the phase comparator. The main divider chain receives the buffered VCO
VCO Output VCO Voltage Controlled Oscillator Frequency Sample Xtal Controlled Reference Oscillator Frequency DC Voltage Control
Phase/Frequency Comparator
Figure 11-6, Basic PLL Block Diagram output from the mixer/oscillator IC and applies it to a fixed divide-by-8 prescaler which feeds a programmable divider section. The main frequency divider thereby divides the VCO frequency down to a value near 7.8125 KHz for application to the other input of the phase comparator. The phase comparator compares the two divider chain outputs, producing an error signal which is amplified and low pass filtered by the error amplifier and used to tune the VCO until the main divider chain output frequency is exactly 7.8125 KHz. The VCO can therefore be tuned to any desired channel by changing the division ratio of the main divider chain. Both divider chains receive division ratio preset data from the system microprocessor via the IIC bus. The PLL frequency synthesizer IC also provides the tuning voltages required to tune the tracking filters in the tuner RF section. The tuning voltage is derived from the error amplifier output in the PLL section. The filtered error signal is applied to a series of high-voltage digital-to-analog converters (DACs) which adjust the error voltage as necessary to provide track-tuning voltages which precisely fine-tune the tuner tracking filters to the desired channel frequency. This arrangement provides an exceptionally accurate tuner bandpass response compared to conventional tuners without such electronic alignment. Control data for the DACs is stored in tuner EEPROM U32601 during electronic alignment of the tuner.
164 Tuner/IF The PLL synthesizer IC also contains bandswitching logic which receives data from the system microprocessor via the IIC bus and sends bandswitch commands to the mixer/oscillator IC and tuner tracking filters.
Bandswitching The MM101 tuner frequency range is divided into three bands; VHF LOW (55.25-139.25 MHz), VHF HI (145.25-379.25 MHz), and UHF (385.25-801.25 MHz).
Band 1 2 3 Channels Cable 1-6, 95-99, 14-17 7-13, 18-50 51-125 Off-Air 2-6 7-13 14-69 Frequency Range 54-144 MHz 144-384 MHz 384-804 MHz
Figure 11-7, MM101 Tuner Bands
The three bandswitch outputs, pins 14, 15 and 17 select between the VHF and UHF broadband components of the tuner. Pin 14 (BS1 BV/U) selects the UHF or the VHF RF amplifier. Pin 15 (BSX) selects the VHF or UHF mixer that is internal to U25701. Pin 17 (BS1/2) places either the VHF or UHF local oscillator circuitry on or off. Bandswitching is accomplished by using PIN diodes to switch in and out inductors and capacitors to determine the frequency range of the tuning circuitry. The following chart shows the PLL output pin voltages associated with band switching and the channels in each of the three tuning bands.
U25501 Pin 14 15 17
Callout BV/U BSX BS1/2
Band 1 Low Low High
Band 2 Low Low Low
Band 3 High High High
Figure 11-8, Band Switch Chart
Tuner/IF 165
RF IN
T25801 Main/PIP Splitter
RF to PIP 4
UHF RF Amp
16
17 18 19 12 UHF Tank Circuit CR25701
UHF Single Tuned UHF/VHF Splitter VHF Single Tuned +12Vs +12Vs
R25514 470
Double-Tuned PRI/SEC
5
6
VHF RF Amp
Double-Tuned PRI/SEC
13 14 15
7
VHF Tank Circuit CR25702 CR25703 -12Vs
Q25504
-12Vs
R25516 6800
11
U25701 VHF/UHF MIXER/OSC
9 10
+12Vs
R25511 100K Q25503
R25512 100K
+12Vs
R25513 4700 R25515 2000
R25606 47
R25510 100K
Q25601 To SAW Filter & U32603-5/6 Video IF
R25610 0.5
Q25505 14 BS1 BV/U +12Vs 15 BSX BS1/2 Loop Filter 17 5
IF Filters VC1 VC2
U25501 PLL
14
15
U32602 Main Tuner DAC
Figure 11-9, Main Tuner Bandswitching
Tuning Once the bandswitching circuitry has selected the desired band, the specific channel is selected by the PLL section. It first tunes the selected VCO to the desired local oscillator frequency. Then the DAC's in the PLL synthesizer tune the RF tracking filters to the channel center frequency. Referring to Figure 11-11 on the next page, the DAC output at pin 6 provides a varactor tuning voltage for the VHF and UHF single-tuned filters, and DAC outputs at pins 7 and 8 control the primary and secondary, respectively, of the VHF and UHF double-tuned filters.
166 Tuner/IF Tuner Alignment Channels In order to compress the amount of information stored in the EEPROM, only the exact information required to tune a few channels, known as alignment channels, have been chosen. Only the exact values needed to tune these channels are stored by the EEPROM. When a channel selection is made, the microprocessor decides what band it is in, then what two alignment values it lies between. It must then interpolate or calculate the DAC values required to tune the exact channel frequency. This information is then sent via the IIC bus to the PLL IC, which changes the frequency response of the tuner and the LO for proper channel reception. Because changing one alignment value may affect the interpolation of many of the alignment channels, if any of the alignment values are changed, every value must be checked.
Channel 2 3 6 98 14 17 18 13 29 35 41 45 Band 1 1 1 1 1 1 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 Pix Midrange Carrier (MHz) (MHz) 57 55.25 63 85 111 123 141 147 213 255 291 327 351 369 381 387 423 441 465 489 537 579 609 639 681 711 741 771 789 801 61.25 83.25 109.25 121.25 139.25 145.25 211.25 253.25 289.25 325.25 349.25 367.25 379.25 385.25 421.25 439.25 463.25 487.25 535.25 577.25 601.25 637.25 679.25 709.25 739.25 769.25 787.25 799.25 Local Oscillator (MHz) 101 107 129 155 167 185 191 257 299 335 371 395 413 425 431 467 485 509 533 581 623 653 683 125 755 785 815 833 845
Figure 11-10, Tuner Alignment Channels
48 50 51 57 60 64 68 76 83 88 93 105 110 115 120 123 125
Channel Selection The microprocessor goes through a fixed routine to effect channel selection. Although the instruction routine is lengthy, it is accomplished in less than 150 milliseconds. First, all information necessary to select the channel is retrieved from the Tuner EEPROM. This includes the Local Oscillator (LO) data for the channel, the band switch information and upper and lower alignment channel DAC values for the frequency range that the channel lies within. Now the actual electrical tuning of the RF receiver section may begin.
Tuner/IF 167 The LO and Band Switch information is delivered to the PLL IC and it sets the RF bandpass filters and the LO frequency to the desired values. Next, the interpolation process begins. The correct DAC values for the specific channel selection are calculated by the microprocessor and sent to the PLL IC which then sets the proper voltages on the RF tuning filters to correctly center the tuner frequency response for the selected channel. For example, the microprocessor has a request (from the IR remote control or front panel keyboard) to tune cable channel 53. First, the local oscillator frequency is retrieved and sent to the PLL (U25501) for output from the loop filter on pin 5. A feedback loop from U25701 pins 10 and 11 to the PLL insures the local oscillator remains on frequency. Then the bandswitch values are retrieved and sent to the PLL
RF IN
T25801 Main/PIP Splitter
RF to PIP 4
UHF RF Amp
U25701 VHF/UHF MIXER/OSC
16 17
UHF OSC UHF Mixer
UHF Single Tuned UHF/VHF Splitter VHF Single Tuned
18 19
Double-Tuned PRI/SEC
UHF Tank Circuit CR25701
5
12 6
VHF RF Amp
Double-Tuned PRI/SEC
13
VHF Mixer VHF OSC
7
14 15
VHF Tank Circuit CR25702 CR25703
-12Vs
R25512 100K
+12Vs
1 6 ST 14 BS1 BV/U 7 PRI 8 SEC L01 L02 10 11 15 2 11
LO Amp
+12Vs
R25511 100K Q25503
R25606 47
9
10
R25510 100K
U25501 PLL
43 C IIC 44 D 3 13 C
Run 1
BSX 18 19
Q25601
IF Filters VC1 VC2
R25610 0.5
1 12 5 6
To SAW Filter & U32603-5/6 Video IF
C D
Ref Ref Bias
D
U13101 System Control
U13203 MUX
D C U32601 TUNER EEPROM
BS1/2 17 Loop Filter 5 3
C25507 0.1 R25504 12K
1
2
Y25501 4 MHz R25503 12K
14 4 C IIC 3 D
15
U32602 IF DAC
Figure 11-11, Main Tuner Block Diagram and the outputs on pins 14, 15 and 17 are set. In this case, channel 53 is within tuning band 3 so all three pins would be set high. Channel 53 lies between alignment channels 51 and 57. The microprocessor must now calculate the exact DAC values to send the PLL in order to place the proper voltages on the single-tuned, and primary/secondary double-tuned filters. These voltages come from the DAC's on pins 6, 7 and 8. They tune the RF stage to the exact channel requested. The microprocessor may use any combination of adjacent frequencies to interpolate the required channel values as long as the frequencies remain in the same band.
168 Tuner/IF Software Control The PLL/DAC IC, U25501, is controlled from the main microprocessor over the IIC bus. Data is sent, according to IIC bus specifications, in packets of two to five bytes with the first byte being the address byte. There is a start condition at the beginning of an address byte and a stop condition at the end of the data with an acknowledge condition at the end of each byte. EEPROM Requirements Since the tuners RF filters are electronically aligned, those alignment values need to be stored in nonvolatile memory to be used when tuning channels. The Main Tuner now has its own EEPROM to store these alignment values. This section lists the data format and amount of memory required for alignment data storage in the Tuner EEPROM. Three bytes are needed for each alignment channel. There are 29 alignment channels which total 87 bytes of memory. The segment of memory for alignment data is stored in the order of frequency of the alignment channels. The lowest 3 bytes contain the lowest frequency alignment channel data and the highest 3 bytes contain the highest frequency alignment channel data. The alignment values for a second PIP tuner are different and therefore require a second set of storage locations. The DAC values stored in the EEPROM and that show up on the Chipper Check tuner alignment screen, return values from 0 to 63. The actual alignment values are -31 to +31. The alignment values are translated before storing them in the +12Vt EEPROM by adding 31.
R32669 1000 R32667 1000
R32668 2000
R32629 3300
Part of U32603 Video IF
VID Detect IF Amp 6 C32636 .01uF
Q32612/13 Q32608
NTSC VIDEO to U16502-3 Q32604 Q32607
JW32621 IF from IF Amp, Q25601 To Video Buffers
SF326010 1 5 4
Q32609 21 Vid Out EQ Amp 19
R32667 100
5
Q32610
Phase Detect
17
CF32601 4.5MHz
Video Buffers
+12Vt
1
VCC
VID ACG AGC THRSH AFT
10 11 9 12 13 R32649 4700
3 Threshold 4 11 To Audio FM Tank PIF AGC
From U32602-10
16
2 +5.1Vt 3
DAC MAX DATA
15 AFT OUT 14
L32606 CR32603 45.75 MHz Adjust
4
FM DISC CLOCK VCO
12 10
RF AGC OUT
AFT Out To System Control U13101-37 IF VC2
6 IF VC2 7 IF VC1 14 15 16 R32635 2000 R32636 100 Q32607 R32637 620
R32673 1000
R32674 1000
IF VC1
IF Filter Control Voltage Out To IF Amp Q25601
8
U32602 IF DAC
VID DC
+12Vr
+5Vs
R32631 180K R32676 100 R32632 15K
Q32605 RF AGC To VHF/UHF RF Amplifiers
8 IIC RUN 1 DATA 5
U32601 Main Tuner EEPROM
IIC RUN 1 Clock
6 4
-12Vs
Figure 11-12, Main Tuner IF Block Diagram
Tuner/IF 169 IF Alignments An octal DAC, U32602, is used to control six IF alignments (VCO free run frequency, video amplitude, video dc-level, FM discriminator tank, and RF AGC) and two tuner alignments (VC1 and VC2). The DAC is IIC bus controlled and the outputs can be varied from 0 to +5V in steps determined by software requirements. The values from the Tuner EEPROM for IF alignments are recovered and written to the DAC ports of the IF DAC IC, U32602. These values are the same for all channels, and no further adjustments beyond initial setup are needed. IF Bandpass Filters (VC1 and VC2) The IF bandpass circuits are voltage controlled, but not by the PLL. A new IF DAC IC, U32602, controlled by the IIC bus provides the IF bandpass alignment voltages from pins 14 and 15. The IF filters between the IF outputs of U25701-9/10 and the IF inputs of U32603-5/6 remove remnants of any "sum" frequencies created from the mixing of the incoming RF with the LO that might have escaped from U25701. This leaves a "difference" frequency of 45.75 MHz. The purpose here is to "sharpen" the bandpass response curve to improve adjacent channel selectivity. IF DAC The D/A conversion for the IF alignment and filters is supplied by U32602 and range from 0-5V. The IF DAC IC is limited by the voltage placed on pin 2. This sets a maximum voltage level available from each of the DAC output pins. The IIC bus still controls the output, but it may only range to this maximum level. RF AGC The video IF circuits, part of U32603, also provide feedback to the tuner to prevent overloading of the RF amplifiers. A threshold for the AGC voltage can be set from U32602-4 and the AGC gain of the amplifier is set from U32602-2. RF AGC is then output from pin 10 controlling the gain of the RF amplifiers by varying the voltage on the amplifier gates. AFT Discriminator Automatic Fine Tuning is handled slightly different in the MM101. An analog output voltage from U32603-14 is sent to the microprocessor, U13101-37. The microprocessor then determines if the incoming IF frequency requires trimming to bring it back to the proper center frequency. The output of the AFT is high when the IF is below 45.75 MHz and low when the IF is above 45.75 MHz. This output is applied to an A/D converter in the microprocessor. The microprocessor tuning algorithm determines which way to adjust the LO of the tuner to correct for the proper IF frequency. The process is active only during channel tuning to bring the LO to the correct channel. It does not provide AFT during normal reception for two reasons. First, modern transmitters provide a very stable output and do not drift very far. Second, there is enough automatic adjustment (independent of microprocessor control) of the incoming RF bandpass and IF signal to provide fine tuning without microprocessor intervention.
170 Tuner/IF VCO Free-Run Adjustment A VCO (Voltage Controlled Oscillator) is required by the video IF IC to strip the IF picture carrier (PIF) away from the incoming signal leaving only baseband video. The free-run frequency of the VCO is set electronically. The external tank circuit, L32606, is knifed at the time of manufacture and should never require further adjustment. U32602-13 provides a voltage, controlled via the IIC bus, to fine tune the 45.75 MHz VCO circuit. Video Amplitude U32602-10 supplies a bias voltage to video buffers between the video baseband output of U32603 on pin 17 and EQ input of pin 19. As the bias voltage varies, baseband video amplitude also varies. Video DC Level U32602-16 varies the DC level of the baseband video output from U32603-21. FM Discriminator The FM discriminator will be discussed in the audio section. Tuner Alignment The purpose of the tuner alignment is to communicate to the microprocessor correct Tuner and IF DAC values for each of the 29 alignment channels. Once these values are known, the required values for any channel can be calculated by the microprocessor using mathematical formulas. For example, referring back to the previous discussion of a request to tune channel 53, assume that the DAC output voltage for the primary of the double-tuned filter (U25501-7) for alignment channel 51 is 20 volts and alignment channel 57 is 25 volts. (These values may not be exact. Always consult the service literature for more reliable voltage references.) The alignment channel values are known by the microprocessor from the original alignment procedures. (In reality, the microprocessor does not calculate a voltage. It calculates how many digital steps of the DAC are required to obtain the correct voltage output. Here is where accurate setting of the alignment channels is important!) Using an internal algorithm, the microprocessor now calculates the voltage required to tune channel 53. Figure 11-14 shows a graphical representation of how the correct voltage is interpolated. By the graph, a voltage between +21.5 and +21.75 will correctly select channel 53 (the microprocessor calculates the required voltage much closer). A digital representation of the interpolated voltage is sent to the PLL IC, U25501, via the IIC bus. The PLL IC then converts it to an analog voltage output from pin 7. The other PLL and IF DAC outputs are similarly changed by microprocessor communication based upon the channel selection. The Tuner EEPROM also contains a table of the local oscillator frequencies for every off-air and cable channel. The table allows the microprocessor to send out a digital code that is interpreted by the PLL as the exact LO frequency. This reference frequency is compared to a sample of the LO provided by pins 1 and 2 of IC U25701, the Mixer/Oscillator. Any difference in the two frequencies result in an error correction output from the PLL, U25501-2 which changes the LO frequency by varying the bias voltage of the appropriate tank circuit until the exact frequency is reached.
Tuner/IF 171
RF IN
T25801 Main/PIP Splitter
RF to PIP 4
UHF RF Amp
U25701 VHF/UHF MIXER/OSC
16 17
UHF OSC UHF Mixer
UHF Single Tuned UHF/VHF Splitter VHF Single Tuned
18 19
Double-Tuned PRI/SEC
UHF Tank Circuit CR25701
5
12 6
VHF RF Amp
Double-Tuned PRI/SEC
13
VHF Mixer VHF OSC
7
14 15
VHF Tank Circuit CR25702 CR25703
-12Vs
R25512 100K
+12Vs
1 6 ST 14 BS1 BV/U 7 PRI 8 SEC L01 L02 10 11 15 2 11
LO Amp
+12Vs
R25511 100K Q25503
R25606 47
9
10
R25510 100K
U25501 PLL
43 C IIC 44 D 3 13 C
Run 1
BSX 18 19
Q25601
IF Filters VC1 VC2
R25610 0.5
1 12 5 6
To SAW Filter & U32603-5/6 Video IF
C D
Ref Ref Bias
D
U13101 System Control
U13203 MUX
D C U32601 TUNER EEPROM
BS1/2 17 Loop Filter 5 3
C25507 0.1 R25504 12K
1
2
Y25501 4 MHz R25503 12K
14 4 C IIC 3 D
15
U32602 IF DAC
Figure 11-11, Main Tuner Block Diagram (Repeated)
57
56
55
Channel
54
53
52
51 20 21 22 23 24 25
Volts
Figure 11-13, Channel Tuning Voltage
172 Tuner/IF Troubleshooting The technician will be required to troubleshoot the MM101 tuner down to the component level. Past experience with the TOB technology is essential. A basic knowledge of tuner theory, a good DVM and Chipper Check will enable the technician to troubleshoot, repair and align the tuner. For a review of tuner and TOB fundamentals refer to these previous TCE publications: T-CTC175/6/7-1, T-CTC177/187-TSG, T-CTC185-1 T-CTC195/197 Electronic Alignment After any component replacement the tuner must be checked for proper alignment and if needed, realigned. Electronic alignment should begin with the lowest alignment channel of each band and continue to the top channel. The bands should be aligned in order. Preset all three RF filters to 0, input a signal at the midrange of the channel frequency for the channel being aligned. Adjust the RF filter DAC for peak tuner gain as measured at the proper test point. For Band 1, the secondary double-tuned filter DAC is aligned first, then the primary and last the single tuned. For bands 2 and 3, the secondary DAC is aligned first followed by the single tuned, then the primary. The single tuned DAC is then repeated. RF Bandswitching There are three bandswitching outputs from the PLL IC that affect the RF circuits and the Mixer/Oscillator. The bandswitching charts shown in Figure 11-14 should be the basis for troubleshooting in this area. Pin 14 of U25501, the PLL IC, controls the UHF and VHF RF amplifiers, switching the supply voltages off as needed.
Channels Cable 1-6, 95-99, 14-17 7-13, 18-50 51-125 Off-Air 2-6 7-13 14-69 Frequency Range 54-144 MHz 144-384 MHz 384-804 MHz
U25501 Pin 14 15 17
Callout BV/U BSX BS1/2
Band 1 Low Low High
Band 2 Low Low Low
Band 3 High High High
Band 1 2 3
Figure 11-14, Band Switch Charts (Repeated) Figure 11-14 converts the tables to show typical voltages used by the PLL to switch the RF stages between the three tuning bands. Remember again, that these bands are not the traditional Low VHF, High VHF and UHF/Cable bands, but are bands based on the frequencies of the channels. Refer to Figure 11-13 for the actual tuning bands and the channels located within those bands. There are no alignment values or procedures associated with the bandswitch circuitry.
Tuner/IF 173
Channel Channel Channel Frequencies Frequencies Frequencies 54-144 144-384 384-804 MHz MHz MHz Band 1 U25501 Pin 14 U25501 Pin 15 U25501 Pin 17 Q25504 B Q25504 C Q25505 C Q25503 B Q25503 C +11.7V +0.1V +11.7V +11.7V +0.4V +0.1V +11.7V -11.1V Band 2 +11.7V +0.1V +0.2V +11.7V +0.4V +0.1V +11.0V +11.6V Band 3 +0.3V +4.8V +11.7V +11.0V +11.7V +11.7V +11.7V -11.1V
Figure 11-15, Band Switch Voltage Chart The outputs of the PLL are open collector so care must be taken to follow the voltages correctly. There are two power supply voltages associated with band switching; +12V and +5V. If the +12V supply is inoperative, all bandswitching would cease. Since the PLL depends on the +5V supply for power, if it were inoperative, bandswitching would also cease. However, if the +5V supply did not reach the PLL bandswitch circuits, the PLL would still be operative, but the BSX line going to U25701, the Mixer/Oscillator would cease switching. Providing all other circuitry is operative, the only symptom will be the tuners inability to select band 3, and all associated channels.
RF IN
T25801 Main/PIP Splitter
RF to PIP 4
UHF RF Amp
16
17 18 19 12 UHF Tank Circuit CR25701
UHF Single Tuned UHF/VHF Splitter VHF Single Tuned +12Vs +12Vs
R25514 470
Double-Tuned PRI/SEC
5
6
VHF RF Amp
Double-Tuned PRI/SEC
13 14 15
7
VHF Tank Circuit CR25702 CR25703 -12Vs
Q25504
-12Vs
R25516 6800
U25701 11 VHF/UHF MIXER/OSC
9 10
+12Vs
R25511 100K Q25503
R25512 100K
+12Vs
R25513 4700 R25515 2000
R25606 47
R25510 100K
Q25601 To SAW Filter & U32603-5/6 Video IF
R25610 0.5
Q25505 14 BS1 BV/U +12Vs 15 BSX BS1/2 Loop Filter 17 5
IF Filters VC1 VC2
U25501 PLL
14
15
U32602 Main Tuner DAC
Figure 11-16, Band Switching
174 Tuner/IF Channel Switching Troubleshooting the channel switching circuitry is straightforward and can be accomplished by knowing the tuner voltages present during any channel selection. A DVM (Digital VoltMeter) is all that is required to narrow the list of possible component failures.
RF IN
T25801 Main/PIP Splitter
RF to PIP 4
UHF RF Amp
16
17 18 19 12 UHF Tank Circuit CR25701
UHF Single Tuned UHF/VHF Splitter VHF Single Tuned
Double-Tuned PRI/SEC
5
6
VHF RF Amp
Double-Tuned PRI/SEC
13 14
7
VHF Tank Circuit CR25702 CR25703
1 2
15
U25701 VHF/UHF MIXER/OSC
9 10
6 ST
7 PRI
8 SEC L01 L02 Loop Filter 10 11 5
IF Filters VC1 VC2
Video IF To SAW Filter
U25501 PLL
14
15
U32602 Main Tuner DAC
Figure 11-17, Channel Selection PIN diodes and Varactors are used in the channel switching circuitry to shape the frequency response of the tuner. If any of these diodes fail, the circuit that has the failure will be unable to change frequency, resulting in locked or no tuning. Using a DVM, the voltages coming from pins 6, 7 and 8 of U25501, the PLL IC, should be checked first. If they are correct, follow the circuit path to the diodes. If the DC voltage disappears at any time along the path, this will most likely be the cause of the failure. In any event, the DC voltage path needs to be confirmed as operational before any RF troubleshooting should be attempted. In most cases, component failure, resulting in the loss of one or more DC voltages will be found. Capacitive diodes and varactors for the MM101 tuner are normally replaced as a matched set. Consult the service material for the individual chassis version for the latest information.
Tuner/IF 175 No Tuning The technician must further investigate a no tuning complaint before beginning troubleshooting efforts to the component level. The following steps should assist in those efforts. 1. Verify the on-screen display shows the channel change. If it does not, the problem lies with system control, not the tuner. 2. There are four power supply voltages to the tuner. These are +12V, -12V, +33V and +5V. These should all be confirmed to be OK. 3. Check the bandswitch voltages on pins 14, 15 and 17 of the PLL IC, U25501, confirming the proper channel selection. 4. Check the output voltages of the bandswitching transistors. 5. Check the tuning voltages on pins 6, 7 and 8 of the PLL IC, U25501. Also note that if a tuning voltage is "stuck" either high or low, there may be a problem in the PLL loop, not the IC. Check the 4 MHz oscillator signal on the capacitor side of crystal Y25501. Normal p-p voltage should be around 250 millivolts. 6. Monitor the LO voltage on pins 10 and 11 of the PLL IC. Normal operating voltage will rise as channel selection goes up and lower when channel selection goes down. 7. Check the single tuned, and the primary and secondary double-tuned filter voltages at the varactors. 8. Monitor the AGC voltage on the collector of Q32605, the ACG amplifier. Under no signal conditions, it should be around +7.5 volts. If not, troubleshoot the AGC path. 9. Check the supply voltage to the RF amplifiers, Q25301 and Q25101. When they are on, the supply should be 10 to 12 volts. 10. Check the IF supply voltages on the IF filter varactor diodes. The voltages should read between 1.5 to 3.0 volts. 11. The oscillator tank circuit components may be checked using continuity readings with a DVM.