Text preview for : MMC(G)_Syscon-1_A2D95EE613C1C3CEE0339DFEEACCC3CE_25.pdf part of RCA D52130 Large File 6 pare RAR Folder containing: Flow Charts, Tech Tips, Trouble Shooting Manuals, Updates, Module Training, and Symptom Fixes
Back to : RCA_CTC210-211_01.rar | Home
16
System Control
System Control
The discussion of System Control for the MMC101G/MMC102(G) will center on differences with the original MM101 chassis. For more in-depth information consult the original MM101 Technical Training Manual, T-MM101-1.
System Control
17
Service Menu
The MMC101G/MMC102(G) chassis continues to provide fewer adjustments via the front panel. Figure 3-3 show the current available adjustments and their normal ranges. Most deal with geometry and color temperature adjustments required after picture tube replacement or to satisfy consumer requirements. All other alignments and adjustments must be performed using Chipper CheckTM, TCE's computer-based troubleshooting and alignment software. To enter the service menu with the instrument on, press and hold the MENU button. Then press and release the POWER button. Now press the VOLUME+ button, releasing both it and the MENU button at the same time. The on-screen display will now appear similar to Figure 3-2. The remainder of the procedure is identical to all previous TCE Service Menu procedures. V76 is still the security value to enter the service menu.
CH
VOL
VOL
MENU/OK
CH
POWER
Figure 3-1, MMC101(G) Front Panel Assembly
P 0 000 6.03
V 00
P 0 000 6.03
V 76
Figure 3-2, Service Menu Display
Invalid Parameter Values
As with any adjustment on most television chassis, some parameters in the front panel menu may be adjusted such that improper operation or loss of video display may occur. If the technician is using Chipper CheckTM, operation is easily restored by remembering what parameter was changed. However, if the technician is using the front panel menu and loses video, there will be no way to recover without using Chipper CheckTM. The following adjustments could cause particular problems if adjusted incorrectly. l l l Vertical Slope MSB: Incremented too high causes loss of vertical scan (and, of course OSD) Vertical Scan Start: Similar to Vertical Slope MSB Comb D/A: Decremented too low causes loss of video
TECH TIP
18
System Control Parameter Name Security pass-number Error Detection (1st) Error Detection (2nd) Error Detection (last) Horizontal Phase Width Align Width 9151 Ref E/W Parabola E/W Trap E/W Corner Vertical Offset Vertical Amp Aligned Vertical Amp Delta Vertical Center Vertical Movie Mode Vertical Slope MSB Vertical Slope LSB Vertical Start Scan Red Cutoff Green Cutoff Blue Cutoff Video Mode Cutoff (Brightness Align) Red Drive Blue Drive Video Mode Light Output Text Mode Cutoff (Brightness Align) Text Mode Light Output AKB Mode Red Cutoff (override) Green Cutoff (override) Blue Cutoff (override) Cutoff (override) Comb D/A (Composite) FPIP Contrast (Composite) FPIP Fine Tint (Composite) FPIP Saturation (Composite) Comb D/A (SVideo) FPIP Contrast (SVideo) FPIP Fine Tint (SVideo) Value Range 76 Notes and Comments Will not advance to parameters until value is set to 76.
Parameter # 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
00 - 53 00 - 63 00 - 63 00 - 63 00 - 07 00 - 63 00 - 07 00 - 53 00 - 15 00 - 63 00 - 02 00 - 255 00 - 255 00 - 59 00 - 255 00 - 255 00 - 255 00 - 255 00 - 127 00 - 127 00 - 117 00 - 255 00 - 107 00 - 01 00 - 255 00 - 255 00 - 255 00 - 255 00 - 127 00 - 127 00 - 255 00 - 127 00 - 127 00 - 127 00 - 255
. 0=Normal; 1=Movie1; 2=Movie2
Note: Adjusts Current Video Mode. i.e. (if in VGA mode when service menu was accessed then VGA mode would be effected.)
00 = Disabled 01 = AKB enabled Note: PTV is 00 default and should not be adj.
Figure 3-3, Service Menu Adjustments
System Control
19
Parameter Parameter Name # 39 FPIP Saturation (SVideo) 40 Digicon Bus Control 41 RGB Output Mode
Value Range 00 - 127 00 - 01 00 - 03
Notes and Comments Note: 00 Default DO NOT ADJ. 0=Normal; 1=Red Only; 2=Green Only; 3=Blue Only For Gemstar only For Gemstar only For Gemstar only For Gemstar only For Gemstar only
42 Gemstar Horizontal OSD Position 00 - 255 43 Gemstar Vertical OSD Position 00 - 255 44 Gemstar Horizontal PIP Position 00 - 255 45 Gemstar Vertical PIP Position 00 - 255 46 Gemstar PIP Window Vertical Size 00 - 13 Digital Convergence Mode 00 Security pass-number for must set to Note: This access' R,G,B, & YUV Convergence Mode Cutoff (override) 80 PTV Sensor Positioning 00 Security pass-number for Sensor must set to Positioning 82 PTV Restore Digital Convergence Factory Alignment Data - works for the current mode only, Reads from the digicon factory default eeprom & writes data to the digicon IC, sends the write all command to write all registers to the digicon eeprom for the current mode & register set. 00 Security pass # to Restore Factory must set to Align Data 83 PTV Save Digital Convergence Factory Alignment Data 00 Security pass # for Save Alignment must set to Data 84 Access to Warranty Clock Menu 00 security pass-number for Warranty must set to Menu 90
Figure 3-3, Service Menu Adjustments (Continued)
Figure 3-4, Chipper Check Connector Location
20
System Control
Error Codes
Under normal conditions, failure of an IIC device will prevent the set from turning on and also log an error code in the first three parameter locations of the service menu. These error codes and their meaning will be discussed later. Because a possible reason for service is a failed bus device, the normal microprocessor routine to check for IIC device acknowledgment is disabled in the service mode. As with previous chassis, the MMC101G/MMC102(G) logs error codes in the EEPROM during certain failure scenarios. In general, there will be an error code for each IIC bus device, plus a few other devices. When one of these devices fail, an error code will be stored in the EEPROM. There is room for three failure codes. These are the first error, the second error and the last error.
TECH TIP
Note: Because the first two error code locations do not update continuously, there is no way of knowing exactly when the error occurred. However the third location will always have the latest code. It is good practice to write the three codes down, then "zero" the error code locations. Then attempt to start the set normally and let it again update the error code list. Now a fresh set of error codes will be available to the technician. (See the Chipper CheckTM Section for more details.)
If an error code matches one in the following table, then that device did not acknowledge a microprocessor command. For example, if error code 13 is logged, a FAN DETECT error has been detected. The technician would then narrow troubleshooting efforts around that device. Initial efforts would include the basic "goes-in-to's & goes-out-as" plus verification of supply power. In some cases, an error code may not be included in the table. If the error code read, is a listed code incremented by one, a read error from that device is indicated. For example, if the error code is 136, the TVB IC or associated circuitry is at fault. If the error code is 137, the read register of the TVB did not respond. Failure of the TVB, or TVB circuitry might still be indicated. In these cases, IC failure, or failure of supply power to the IC is indicated more than associated circuitry. Other error codes may indicate a failure condition in different areas of the chassis, such as the cooling fans and power supplies. It is important to understand how these error codes are detected by the system control circuitry so they can be interpreted correctly and used as clues leading to successful servicing.
System Control Many error codes will also place the set in "Power Fatal" mode. They are noted in Figure 3-5. After the initial failure, system control will attempt to restart the set twice. If the last attempt (third shutdown) to restart is unsuccessful, the micro will shut the set down and log the error code. "Power Fatal" modes can not be forced on by accessing the service mode as can be done with non-fatal error codes. After the micro logs the error code the set may again be restarted with the power switch and if the problem still exists the set will again do the 3 strikes you're out routine. Figure 3-5 shows "Power Fatal" as Yes, No and Maybe. No and Maybe would indicated a soft shutdown and in most cases can be over ridden by accessing the service mode, before the 3rd strike, to force the set on. The error codes are separated into two categories; IIC devices and Power On faults. Power On faults are generally non-IIC devices, but can include some IIC devices if they fail the initial Power On Reset (POR) command. The micro will generally log errors due to lack of acknowledgment of a requested write or read command. If the problem is one that does not seem to allow a service mode override, Chipper CheckTM, TCE's software based troubleshooting and alignment software, is able to read the EEPROM error code locations. However, the +5V standby supply must be operational. Generally, it can be stated that if an error code is noted in the service mode and is not listed in this error code list, it could be an invalid number due some software glitch, or it could be an active device read error. All IIC devices have a corresponding write and read error code, plus confirmation of the event. For example, error 160 refers to the main EEPROM and indicates a write command that the micro was unable to verify properly executed. 161 indicates the micro requested information or a status condition from the EEPROM, but was unable to read it. Also note that some error codes seem to indicate two different device errors. Upon closer inspection, the two devices share an error code, but are on separate bus lines. There is no way at this time to differentiate the two. Both should be regarded as defective until one can be eliminated. Under certain circumstances, the +15V standby supply can drop out and the set will shut down intermittently or even go through a "batten down the hatches" routine. It is possible that no error code will be logged. If the complaint is intermittent shutdown and no error codes are shown, monitor the +15V standby supply, associated circuits and any devices powered by this supply.
21
TECH TIP
TECH TIP
Chipper CheckTM
Please refer to the section of this manual outlining Chipper CheckTM operation with TCE products. Most alignments will be handled using Chipper CheckTM. All service menu alignments and adjustments are also included and can be performed using Chipper CheckTM. Except for color temperature and screen geometry adjustments, Chipper CheckTM is the preferred method for all service diagnosis and adjustments.
22
System Control
E rro r C o de
1 3 6 7 9 10 11 12 13 16 17 18 20 22 24 25 26 4 4 /4 5
Powe r Fatal
Ye s Ye s M aybe Ye s Ye s M aybe M aybe M aybe Ye s Ye s N ever Ye s Ye s N ever N ever N ever A lw a y s M aybe M aybe M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M ayb e M aybe M aybe M aybe
E rro r
I n it ia l P o w e r F a il + 1 2 V R un S - V id e o S w it c h Scan Loss V id e o I C F 2 P IP P O R S te r e o D e c o d e r AV R L a tc h e d F a n S to p p e d IIC R un1 o r Run2 Bus Error U S B B u s L a tc h e d IIC S tand b y Bus S o ftw a r e S ta c k O v e r flo w 4 - S t r ik e s - Y o u ' r e O ut O c c u r r e d C o nvergence P a r it y E r r o r C o nvergence L o o p H a lt e d C o nvergence O u t p u t I n a c t iv e F 2 P IP IC U S B H ub IC P IP IF D A C M a in T u n e r D A C D e fle c t io n D A C SYN C Proc S te r e o D e c o d e r C o m p o s it e A V S w it c h N TSC D ecoder TVB D e fle c t io n Processor I/O E E P R O M M a in T u n e r EEPRO M D e fle c t io n EEPRO M 2 nd Tuner EEPRO M O S D IC P IP Tune r P L L P IP IF D A C M a in T u n e r P L L M a in I F D A C S y s t e m M ic r o
B us
--RUN 1 -RUN 1 RUN 1 RUN 2 ---USB ------RUN 1 USB RUN 2 RUN 1 RUN 2 RUN 2 RUN 1 RUN 1 RUN 1 RUN 2 RUN 2 STDBY RUN 1 RUN 2 RUN 2 RUN 1 RUN 2 RUN 2 RUN 1 RUN 1 --
D e vice
+ 1 2 V R un D r o p o ut + 1 2 V R un M o n it o r U16500 D e fle c t io n U22300 U18100 U31701
C o nditio n
C h e c k + 1 2 V R un C h e c k + 1 2 V R u n R e g u la t io n I C o r S u p p ly F a ilu r e Loss of Scan I C o r S u p p ly F a ilu r e I C o r S u p p ly F a ilu r e I C o r S u p p ly F a ilu r e AV R A c t iv e F a n o r F a n D e t e c t C ir c u it F a ilu r e I I C c lo c k o r d a t a fa ilu r e I C o r S u p p ly F a ilu r e I I C c lo c k o r d a t a fa ilu r e V a r io u s C o n d it io n s . system. Reset
U13101 U13101 U13201 U13101 U13101 U13101 U19502 U19502 U19502 U18100 U13201 U27902 U32602 U24800 U38300 U31701 U16501 U22300 U11800 U14350 U13102 U32601 U14354 U27903 U13202 U17401 U27902 U25501 U32602 U13101
F a u lt D e t e c t e d b y M ic r o E E P R O M fo r C u r r e n t M o d e is C o r r u p t e d C o nvergence Loop not O p e r a t in g P r o p e r ly C o n v e r g e n c e O u t p u t is I n a c t iv e I C o r S u p p ly F a ilu r e I C , S u p p ly o r U S B d o w n s t r e a m d e v ic e fa ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p ly E r r o r I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p l y F a ilu r e I C o r S u p p ly F a ilu r e I C o r S u p p ly F a ilu r e N o C o u m m u n ic a t io n s B e tw e e n U 1 3 1 0 1 and U19502
5 2 /5 3 /5 4 /5 5 6 4 /6 5 6 6 /6 7 68 7 2 /7 3 1 2 8 /1 2 9 134 136 136 140 1 6 0 /1 6 1 1 6 4 /1 6 7 1 6 4 /1 6 7 1 6 8 /1 6 9 1 8 6 /1 8 7 192 194 196 198 220
Figure 3-5, MMC101G/MMC102(G) Error Codes
NOTICE The remaining pages in this document are from the "MM101 Technical Training Manual".
118
System Control
+5Vs
8 5 D
MAIN EEPROM U13102
8 5 D
DDC2 EEPROM U13206
D
External DDC2 Device
23
To Run Supplies Run: Lo Stdby: Hi
EEPROM ENABLE STBY DATA STBY CLK DDC2 DATA DDC2 CLK From DIM Tuner From +33Vr Supply From +12Vr Supply
6 44 43 19 20
C 1,2,3,4,7
6
C 1,2,3,4
C
4
OFF / ON
51 5 38
RESET
+5Vs
POWER FAIL
+12Vr 16 3 D
+33 4 19 D
+5 9
+5Vs 2,8
D
+12Vt +5Vt 1 5 3 D
PIP IF DAC U27902
+7.5 3 44 D
VG A Bus Expander U38300
+12Vr 2 29 D
TVB U11800
+8.0Vr 16 17 D
Horizontal PLL U14350
+12.0Vr 1,2 3 D
Deflection DAC U24800
+12.0Vr 2,3,8
16
+12V RUN U13203 I2C BUS MULTIPLEXER
2
20
5
D
Deflection EEPROM U14354
System Control U13101
R13175 100K
13 D 3 C 46 45 10 A
Ster eo Decoder U31701
2nd T uner PLL U17401
2nd Tuner EEPROM U27903
C
4 C
18 C 5,14
6
4 C
43 C
30 C
18 C
4 C
6
C
17 15 SEC
TIMER
Select A Select B
1,3,4,7 12 6,7,8 46
4,28
7,9,13,15
5,7,8
1,4,7
C13144 220uF
9 B
I2C RUN 2
30 41 +3.3V 9,30 D 18
Universal Serial C 19 Bus
D 14 C 5
15 D 2 C
I2C USB
I2C RUN 1
D 12
C 1 +3.3Vr
4,12,31,46,56,66,69, 75,80,84,91,94,96,99
7,8 +33Vs 2,3,5,20,29 4 19 D
Main Tuner PLL U25501
+5Vs 2,8
D
+12Vt +5Vt 1 5 3 D
Main IF DAC U32602
+3.3Vr
6,14,22,32,40
+9Vr 7,9 2 D 2 D
S-Video Switch U16500
+9Vr 9
+9Vr +5Vr 40 46 27 D
Video Signal Processing U22300
5 11 D 10 C
12
Tuner EEPROM U32601
C
27 D
Frame Comb U16301 F-PIP U18100
Composite Video Switch
18 C
6
4 C
28 C
2,8,40,55,62,63,65, 67,95,97,71,77,82,89 2,4,8,15,25,34 42,46,48,50,52
4 C
4 C U16501
28 C
1,3,4,7 12,20 6,7,8
19
19
14 19 26
Figure 9-1, MM101 IIC Interconnect System Control The MM101 chassis uses a single Thomson ST9 family micro controller (microprocessor) specially suited for system control functions in a television chassis. It is a 56 pin SDIP package using a 16 bit processor with 8 D/A (Digital to Analog) converter ports individually addressable for different functions. Communications with connected devices utilize the IIC (Inter Integrated Circuit) protocol. An integrated OSD (On-Screen Display) peripheral function allows a display of up to 15 lines, 34 characters long, using 8 colors, 4 font sizes and operation in 1H or 2H (twice Horizontal Scan) mode for a sharp appearance during all scan modes. The microprocessor decodes closed captioned information when available using the OSD to display it. Programming information is stored outboard from the microprocessor in a 4KiloBit (512Kbyte) EEPROM that contains all system control functions, some chassis alignments, status registers to store customer settings and current operating conditions. There are three other EEPROM's associated with different chassis functions. Some contain other chassis alignments. The System Control microprocessor IC, U13202, is responsible for monitoring and controlling virtually all functions of the chassis. U13202 receives all operator inputs from the front panel keyboard or the remote control hand unit and interprets them for the control of different chassis functions. System control also generates channel tuning data, picture control (tint, color, etc.) signals and provides the Power On command. The microprocessor is always "alive" unless the AC is disconnected or the set is placed in "serviceman" (requiring Chipper Check control) mode.
System Control There are at least 15 individual devices directly controlled by the main IIC bus. To alleviate loading, the main bus is split into three bus lines. Two are connected to various MM101 chassis components, one drives the USB downstream control device. The use of separate buses accommodate IC's on Standby or Run supplies and also accommodate IC's that use common bus addresses. Keyboard Scanning Figure 9-2 illustrates the keyboard scanning inputs and outputs. Keyboard scanning consists of one Key Scan output (KD1) and three Key Scan inputs (KS1, KS2, KS3) lines on system control IC, U13101. The input ports (KS1-3) are scanned continuously by the microprocessor and when a high or low is detected at the input, system control begins pulsing the output lines. When the proper output signal has been decoded by the microprocessor, the selected function is performed. IR Remote Control Input Infrared remote control signals are captured and amplified by IR13401 and appear at pin 3 as 5 volt negative going data pulses. When no IR is received, the DC level at pin 3 is about 5 volts. IR13401 is powered by the +5 volt standby supply in most models. In others, the +12 volt standby supply, limited by a 5.1 volt zener diode, CR13401 powers the device.
119
SK13431 VOL-
SK13421 VOL+
SK13411 POWER
Chipper Check Service Connector 1 J13202
I2C DATA
I2C CLK
I2C MUX A
I2C MUX B
IR RECEIVER IR13401
SK13430 MENU
R13401 750 R13402 SK13420 CHANSK13410 CHAN+
+5Vs
+5Vs
To Run Supplies Run: Lo Stdby: Hi
R13175 100K
36
IR
41
48
KS3
49
KS2
50
KS1
6
KD1/ATE ENABLE
44
43
46
Select A
45
Select B
16 29
4
OFF / ON
System Control U13101
17 15 SEC
TIMER
RESET POWER FAIL +12V RUN RESET OUT
C13144 220uF
51
5
From Voltage Developed by Standby Transformer T14600-12
38
52
30
From DIM Tuner
From +12Vr Supply
To USB & OSD Sync
Figure 9-2,
System Control Keyboard Control
120
System Control System Configuration All system configuration is setup by software and controlled via the IIC bus. The microprocessor can react to changing consumer settings, but cannot of itself set chassis optional features or controls. The system configuration is stored in the EEPROM and downloaded to system control at startup. Although there are five separate IIC buses, the system control microprocessor has only two directly connected. Although there is a physical connenction to the IIC lines, the MM101 micro does not control or monitor the DDC inputs. The other IIC lines connect with the main EEPROM and chassis devices via a multiplex arrangement. The IIC bus multiplexer divides the micro IIC bus into three individual lines. One of these communicates with the USB device, the other two (Run1 and Run2) with the remainder of the IIC chassis devices. Standby/AC Line Dropout Detector The system control microprocessor monitors all device and power supply operation. To prevent loss of data, alignments and operation, the main power supply is monitored to give system control indications of impending power outages. After startup, pin 5, Power Fail, monitors a voltage generated from the standby transformer, T14600 pins
+5Vs FROM T14600 STANDBY POWER TRANSFORMER
JW14601 L14601 22UH [R14623] 10K Q14607 CR14602 [R14622 1700 [R14621] 4700 [R14620] 470 CR14621 CR14620 10V 10V
TO Micro, U13101 Pin 5, PWR FAIL NORMAL: High Power Fail: Low
[R14624] 470
Normal: -24V
-12Vs R14615 470 3W
Q14608
C14609 220UF
CR14603 12V
Figure 9-3, -12V Standby Supply 12-11, for proper operation. It is assumed that if AC power disappears, all supply voltages will begin to drop exponentially. The negative supply generated from T14600/ 11-12 is from an unregulated direction and begins to drop almost immediately upon loss of incoming AC. It becomes a good indicator of T14600 primary winding current and consequently the AC supply (See Standby Supply section for operational details of the Power Fail circuit in Figure 9-3). The +5 volt standby supply does not have as much load and remains stable for at least two time periods. In this time, the negative supply has dropped well below operational levels. System Control notes the rapid drop and begins timing itself. It takes approximately 100 milliseconds before the +5 volt supply drops below operational level, but within 5 milliseconds after system control realizes the onset of power supply failure, it begins the "Batten Down the Hatches" routine to save off alignment and operational data to the EEPROM. System control assures itself enough time to perform this routine by stopping all run supply operation one millisecond after it senses AC loss.
System Control 15 Second Timer If proper power supply operation is restored within 15 seconds after the beginning of a detected failure, the set will be returned to normal operational conditions established just after the failure began. The RC time constant set by R13175 and C13144 on pin 17 sets this time. If the power supply dropout lasts longer than 15 seconds, the set will initialize itself in standby mode as if a normal shutdown sequence had occurred. Power Reset Occasionally, microprocessors may need resetting. In the MM101 chassis, this is normally required only during power outages or after power supply drops and dips. This not only protects operational information needed by the microprocessor from being lost, but also protects the microprocessor from losing operating system information.
121
SK13431 VOL-
SK13421 VOL+
SK13411 POWER
Chipper Check Service Connector 1 J13202
I2C DATA
I2C CLK
I2C MUX A
I2C MUX B
IR RECEIVER IR13401
SK13430 MENU
R13401 750 R13402 SK13420 CHANSK13410 CHAN+
+5Vs
+5Vs
To Run Supplies Run: Lo Stdby: Hi
R13175 100K
36
IR
41
48
KS3
49
KS2
50
KS1
6
KD1/ATE ENABLE
44
43
46
Select A
45
Select B
16 29
4
OFF / ON
System Control U13101
17 15 SEC
TIMER
RESET POWER FAIL +12V RUN RESET OUT
C13144 220uF
51
5
From Voltage Developed by Standby Transformer T14600-12
38
52
30
From DIM Tuner
From +12Vr Supply
To USB & OSD Sync
Figure 9-4, Syscon Inputs
122
System Control EEPROM Power The main and DDC2 EEPROM's are powered by the +5V standby supply. The microprocessor enables power with a low (0V) signal from pin 23. The microprocessor can reset the EEPROM by sending a high (+5V) signal, turning off Q13109, removing power to the EEPROM.
+5Vs
Q13109
8 5 D
MAIN EEPROM U13102
8 5 D
DDC2 EEPROM U13106
23
To Run Supplies Run: Lo Stdby: Hi
EEPROM ENABLE STBY DATA STBY CLK DDC2 DATA DDC2 CLK
6 44 43 19 20
C 1,2,3,4,7
6
C 1,2,3,4
4
OFF / ON
Figure 9-5, EEPROM Power Feature Auto Detect As with previous auto-detect chassis, the MM101 will be able to recognize certain features and options. At the time of this printing, the only autodetect feature known is digital convergence and single or twin tuners. Run Supply Detector The system control microprocessor monitors the run supplies during turn on and run. At turn on +12V is checked prior to IC initialization. During run it is monitored in order to launch into a shut down routine prior to the loss of power. This is to prevent damage to circuitry requiring a specific shutdown order. Pin 5 was discussed previously. Pin 38 monitors the +12V run supply for proper operation. The supply should regulate within -20%. If it falls below this tolerance, the microprocessor will initiate a shutdown sequence and log an error code.
Run: Lo Stdby: Hi
R13175 100K
System Control U13101
17 15 SEC
TIMER
RESET POWER FAIL +12V RUN RESET OUT
C13144 220uF
51
5
From Voltage Developed by Standby Transformer T14600-12
38
52
30
From DIM Tuner
From +12Vr Supply
To USB & OSD Sync
Figure 9-6, Run Supply Detection
System Control Main Power Supply On/Off Control Pin 4 of the microprocessor initiates the on/off routine for the chassis. An output logic 0 (0 volts), turns off Q14105. As its collector goes high, the LED portion of U14102 turns on, turning on the switch, allowing current flow from U14102 emitter to collector. The remainder of the turn-on sequence will be discussed in the power supply section. +24Vr +12Vs +12Vs
CR14131 27V OFF/ON FROM SYSTEM CONTROL ON (RUN): Low OFF (Stdby): High 4 R13185 1000 R13187 100 R14138 1000 R14132 1000 R14131 68K R14135 510 R14133 510 RAW B+ R14105 47K 1W
123
JW14102
RUN: +12V STNDBY: 0V
OFF-ON
1 U14102 Q14105 C13138 1000 C14114 .01UF R14121 6800 2 R14118 5100 Q14105 ON: STNDBY OFF: RUN R14120 330 R14100 0.82
4
RUN: ~+0.3V STNDBY: ~+1.4V
3
U22300
Power Down When the microprocessor receives a turnoff command from the IR, front panel switches or software, pin 4 goes high (logic 1, +5 volts), turning on Q14105. When it turns on, its collector goes towards ground, removing power supply from the LED of U14102. U14102 turns off, removing the current path from Raw B+ to the startup circuitry of the main power supply and it shuts down. The circuit also monitors the +24Vr supply. If it increases too far, zener CR14131 conducts raising Q14105-B high enough to turn on. When Q14105 turns on, main power is shut down in the same manner as previously described. Batten Down the Hatches! The MM101 will continue to utilize a software routine to shut down all active circuitry during a recognized catastrophic failure or premature (unexpected) power supply drop. It will also use this routine if a hardware command is sent, but not acknowledged as executed by the device. Normally, each command sent from the microprocessor is acknowledged as received and properly executed by the individual device. The routine (known as "batten down the hatches") utilizes power still remaining in the standby supplies to store off principal operating conditions (and alignments that may have changed during the latest operating session) to the EEPROM. The microprocessor then initializes as "normal" a shutdown sequence as possible with the power that remains. Once a shutdown condition begins, the "batten" routine starts. The microprocessor will attempt to restart the set twice. If the set fails to start after the second attempt, it will be shut down the third and final time. This is affectionately known as "Three strikes and you're out!" Note that the set only attempts two starts, but shuts down three times.
Figure 9-7, On/Off Control
R14106 0.039
124
System Control Microprocessor Pin Assignments Understanding the role of the microprocessor in system control will assist the technician in any troubleshooting efforts. The microprocessor requires information from external connections to operate and make decisions based on operating conditions. Many of the signals are digital and can be classified as static or dynamic. Digital signals are normally either a logic 0 (low) or 1 (high). Static digital signals are normally either 0 or 1, switching between the two either very seldom, or only during certain conditions. They can be measured with a standard DVM. Refer to the chart below for nominal levels. Normally static levels are either HI or LO so measurement becomes very simple.
HI O
{ {
5.0 volts 2.5 volts 0.0 volts
Figure 9-8, Static Logic Levels Dynamic digital signals may be very hard to measure or confirm without adequate test equipment. Fortunately it is normally only necessary to see whether a dynamic digital signal is present or not. Figure 9-9 shows a normal clock pulse. The clock runs at 50 kilohertz during operation, switching to a lower speed during the time when the chassis is "off". If this signal is not present at each device having an IIC connection to the micro, a problem is indicated.
Figure 9-9, IIC Clock Pulse Data line activity can be observed in the same manner. No attempt to actually translate the data would be useful. A complete map of all the communications protocol would be required. Merely confirming whether the data pulse exists is usually adequate.
Figure 9-10, IIC Data Line Activity
System Control
U13101
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 FULL_BLANK N/C SCAN_LOSS OFF-ON POWER FAIL KD1/ATE ENABLE AUD CTL 1 AUD CTL 2 AUD CTL 3 SRS ON/OFF SRS-ENH AVR 2nd TUN AFT FAN DETECT CC VIDEO VDD2 15 SEC TIMER 2nd TUN SYNC DDC2B DATA DDC2B CLK Vpp Vpp V_FREQ H_FREQ RESET OUT RESET KS1 KS2 KS3 Z_COIL MLTPLX A MLTPLX B I2C DATA I2C CLOCK OSC IN Vss 2 OSC OUT SND LOGIC A/D +12V MONITOR MAIN TUNER AFT IR HORZ SYNC VERT SYNC OSD FILTER VDD A CPU FILTER VSS 1 VDD 1 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
125
MAIN TUNER SYNC USB INTERUPT EEPROM ENABLE OSD HALF FSW BLUE OSD GREEN OSD RED OSD
Figure 9-11, Microprocessor Pin Out Aside from the digital communications via the IIC bus, and other direct digital signal connections, some analog signal inputs and outputs are needed. The following chart names all inputs and outputs, their function and whether they are input, power or output signals.
126
System Control It also may help to understand the different logic levels used by the MM101 microprocessor. Input levels fall into four categories: CMOS, TTL, Schmidt, and A/D. The table in Figure 9-12 shows the normally expected levels to produce logic HI's and LO's. Voltages that lie between the logic levels are considered invalid by the micro.
Logic 1 (HI) > 0.7 V > 2.0 V > 0.7 V Vdd Logic 0 (LO) < 0.3 V < 0.8 V < 0.3 V Vss
Input CMOS TTL Schmitt A/D
Figure 9-12, Expected Logic Input Levels Output levels vary among four digital and analog categories: Standard Digital, PWM-open drain, RGB OSD D/A, and FSW (Fast Switch for PIP) digital. Figure 9-13 shows the normally expected levels.
Output Standard PWM RGB OSD FSW D/A Logic 1 > 0.8 V + 5.0 V Vdd 2.7 - 4.0 V Logic 0 < 0.4 V < 0.4 V Vss 0.0 - 0.05 V
1.
Figure 9-13, Expected Output Levels FULL_Blank: PWM output that issues a separate blanking signal for full screen blanking during 2H scan. If not, during OSD, an unblanked portion of video will be present on-screen. Not used at present time. SCAN_LOSS: CMOS input used to tell the micro of an overvoltage or sync unlock condition in the scan circuits. The micro will then (<1 msec) blank the screen, disable sync, and recalculate the new scan mode, if possible. The new sync calculations will then be applied for at least 100 msec awaiting a correction of the overvoltage condition or to re-establish sync. If no further scan errors are detected and sync is established, the micro will then unblank the screen. Logic HI: Logic LO: Normal operation Interrupt condition
2. 3.
System Control 4. OFF-ON: Standard output line used to turn the MM101 off and on. Logic HI: Logic LO: 5. Standby mode Run mode
127
POWER FAIL: A logic input interrupt that notifies the micro that system power has fallen below operational levels. The micro will then initiate "batten down the hatches" before the +5V standby supply begins to sag. The line is sampled within 1 msec after a power fail condition is first detected. If the condition still exists, the micro sets the OFF-ON line high, turning off the run supplies and the USB downstream supply within 10 msec of the initial problem. If the condition does not correct, the micro will then have approximately 100 msec before the standby supply dies. Logic HI: Logic LO: Power Supplies OK Run Supplies are below acceptable levels
6.
KD1/ATE Enable: This is an output line used to detect front panel button presses. During the first 50 msec after a micro reset, it is read to determine if the ATE mode is being requested. Logic HI: Logic LO: Check for POWER switch activated Check for any key
7. 8. 9.
AUD CTL 1: Standard output line used to select the various audio inputs. AUD CTL 2: Standard output line used to select the various audio inputs. AUD CTL 3: Standard output line used to select the various audio inputs.
AUD 1 1 0 1 0 1 0 1 0
AUD 2 1 1 0 0 1 1 0 0
AUD 3 1 1 1 1 0 0 0 0
Audio Input Selected IN 3 IN 2 IN 1 NTSC Tuner Front A/V not used not used not used
Figure 9-14, Audio Control Logic
128
System Control 10. SRS ON/OFF: Standard output line used to control the SRS feature. Logic HI: Logic LO: Logic HI: Logic LO: SRS On SRS Off SRS Enhanced SRS Normal
11. SRS-ENHanced: Standard output line used to control the enhanced SRS feature.
12. AVR: TTL input line receiving the automatic volume reduction digital signal from the audio AVR line. Logic HI: Logic LO: AVR Inactive AVR Active
13. 2nd TUNER AFT: CMOS input used by the tuning algorithm to fine tune the 2nd tuner. Logic HI: Logic LO: On frequency Off frequency
14. FAN DETECT: CMOS input used to notify system control the cooling fan has failed. Shut down begins within 20 msec after a logic LO has been received. Logic HI: Logic LO: Fan Failure Fan OK
15. CC Video: CMOS input used to strip Closed Captioned information from incoming 2 volt (p-p) NTSC video. 16. VDD2: + 5V standby supply input power. 17. 15 SEC TIMER: CMOS input used to inform the micro when 15 seconds has elapsed after a shut down sequence. If power is returned prior to 15 seconds, the set will return to its operating state just prior to the shutdown. If it is more than 15 seconds, system control will reset to a normal "off" status. 18. 2nd TUNER SYNC: Schmidt input used by the tuning algorithm to fine tune the 2nd tuner. Logic HI: Logic LO: Sync established Sync not established
19. DDC2B DATA: IIC data line for Direct Device Control interface line. 20. DDC2B CLK: IIC clock line for Direct Device Control interface line. 21. MAIN TUNER SYNC: Schmidt input used by the system control tuning algorithm to fine tune the main tuner. Logic HI: Logic LO: Sync established Sync not established
22. USB Interrupt: CMOS input used to alert the microprocessor that a Universal Serial Bus Hub is ready to communicate via the USB IIC bus.
System Control 23. EEPROM ENABLE: A multiple format output line used to switch the standby power supply lines going to the main and DDC2B (if present) EEPROM. This enables the microprocessor to reset the EEPROM in the event of a software latch of the hardware. Logic HI: Logic LO: EEPROM power disabled EEPROM power applied
129
24. OSD HALF: Standard output used to set video intensity to half level during all OSD output. Logic HI: Logic LO: Half intensity video Normal Video
25. FSW: Fast Switch D/A output which blanks normal video where the OSD will be overlaid. Also used to blank normal video where video from the 2nd tuner will be. Logic HI: Logic LO: OSD active, normal video blanked OSD not active, normal video unblanked
26. BLUE OSD: Video output (0-500mV, 0-70 IRE) with OSD information. 27. GREEN OSD: Video output (0-500mV, 0-70 IRE) with OSD information. 28. RED OSD: Video output (0-500mV, 0-70 IRE) with OSD information. 29. VDD1: + 5V standby supply input power. 30. VSS1: Micro ground required for interface circuitry not directly connected to the control micro. It is separated from the main micro ground by a ferrite bead. 31. CPU FILTER: 32. VDD A: + 5V standby supply input power for analog portions of micro. 33. OSD FILTER: 34. VERT SYNC: Schmidt input used to synchronize the outgoing OSD to vertical scan. This signal is sometimes referred to as SCAN_V in service information. It blanks the OSD during vertical retrace. 35. HORZ SYNC: Schmidt input used to synchronize the outgoing OSD to horizontal scan. This signal is sometimes referred to as SCAN_H in service information. It blanks the OSD during horizontal retrace. 36. IR: CMOS input which can interrupt system control to receive IR data from the IR receiver. Logic HI: Logic LO: IR inactive IR active
37. MAIN TUNER AFT: CMOS input used by the tuning algorithm to fine tune the 2nd tuner. Logic HI: Logic LO: On frequency Off frequency
130
System Control 38. +12V MONITOR: This pin has a dual purpose. First, it is the +12V supply for some of the internal microprocessor devices. Second, it monitors the +12V run supply to verify it is active and within regulation. Failure to meet either criteria results in a power shutdown cycle using the "batten down the hatches" routine. Proper regulation is considered within +8%, while a "batten" routine is entered when the supply falls further than 20% below the rated voltage. 39. SND LOGIC A/D: An A/D input used by system control to control abnormal volume increases by adjusting audio volume levels at the TVB based on a software controlled compression algorithm. Expected input levels: 0-5V DC. 40. OSC OUT: Connection for the external 8MHz clock crystal. 41. Vss 2: Main Ground 42. OSC IN: Connection for the external 8MHz clock crystal. 43. IIC CLOCK: Clock line for communications on the main IIC bus line. 44. IIC DATA: Data line for communication on the main IIC bus line. 45. MLTPLX B: Standard output used to switch the IIC bus multiplexer from the RUN 1 to the RUN 2 bus. 46. MLTPLX A: Standard output used to switch the IIC bus multiplexer from the RUN 1 to the RUN 2 bus.
A 0 0 1 1 B 0 1 0 1 I I C B us RUN 1 USB RUN 2 S TB Y
Figure 9-15, IIC Bus Multiplex Selection Table 47. Z_COIL: PWM output allowing a user to access the z-coil adjustment in order to counteract the affects of earth's magnetic field. 48. KS3: One of three CMOS input lines that detect front panel keyboard presses. All three lines are normally HI (+5V) and pulled to ground by the key press. Logic HI (1): Logic LO (0): Key not pressed Key pressed
49. KS2: One of three CMOS input lines that detect front panel keyboard presses. All three lines are normally HI (+5V) and pulled to 0V by the key press. Logic HI (1): Logic LO (0): Key not pressed Key pressed
System Control 50. KS1: One of three CMOS input lines that detect front panel keyboard presses. All three lines are normally HI (+5V) and pulled to ground by the key press. Logic HI (1): Logic LO (0): Key not pressed Key pressed
KS 1 =0 KD 1=0 KD 1=1 C ha nne l U p P o w e r To ggle KS2=0 C ha nne l D o w n Vo lume U p KS 3= 0 M e nu Vo lume D o w n
131
Figure 9-16, Keyboard Logic 51. RESET: CMOS input allowing the DM1 tuner module to reset the micro. Also monitors the +5V standby supply. A drop will cause a reset of the micro, disabling all front panel and IR control. The OFF_ON line will be pulled HI removing all Run supplies. Logic HI: Logic LO: Reset Normal
52. RESET OUT: CMOS output used to reset the Sync generator during sync changes and the USB control IC. Logic HI: Logic LO: Reset Idle
53. H_FREQ: Sometimes called SEL_H in service information. Used to determine the frequency of the horizontal sync pulse to determine the VGA mode. The SEL_H signal is divided by 16 before being applied to the input. 54. V_FREQ: Sometimes called SEL_V in service information. Used to determine the frequency of the vertical sync pulse to determine the VGA mode. The SEL_V signal is divided by 8 before being applied to the input. 55. Vpp: Manufacturing Test Point 56. Vpp: Manufacturing Test Point
132
System Control OSD OSD text, including menu graphics is generated by a separate OSD generator that supports 2.xH scan. The main microprocessor does not include 2xH support at this time. Some text, such as closed-captioned text is generated by the main microprocessor. OSD text is output as RGB video information. A "fast switch" pulse to locate the RGB information on the screen is also generated to place the text of the OSD on the screen over incoming video. The RGB signal may be seen as data pulses coming from pins 26, 27 and 28 of the microprocessor. The Fast Switch (FSW) signal is also used to disable edge replacement during any on-screen display presentation and only affects the immediate PIP or OSD display area. The fast switch signal from pin 25, shown in Figure 9-17, slices out part of the main video and replaces it with the small picture data or video. It does this by switching, (incoming video or OSD information at the F2PIP IC, U18100), between appropriate inputs. Depending upon the timing of the fast switch, the PIP picture or OSD information may be placed over most of the active video screen.
Sample Horizontal Scan Line
Main Pix Video Signal
PIP Pix Video Signal
F ast S witch
Composite Video Signal
Figure 9-17, Fast Switching for PIP or OSD
System Control
133
Sample Horizontal Scan Line
Main Pix Video Signal
Figure 9-18, Main Video Signal and Display Figure 9-18 shows a typical video scene and the corresponding video signal present at the CRT drivers. This is after all processing has been completed. Figure 9-19 shows how the video signal appears after the F2PIP IC compresses the full incoming video selection to the time base required to fit the slice of time required by the FSW signal. The FSW, while basically a switching signal, may be moved forward and backward on the video line in a very complex manner depending upon the PIP or OSD signal. There may also be any number of switching signals on each horizontal line depending upon the incoming PIP or OSD signal.
Sample Horizontal Scan Li ne
PIP Pix Video Signal
Figure 9-19, PIP Video Signal and Display
134
System Control Service Menu The MM101 chassis continues to have fewer adjustments available from the front panel. Figure 9-22 shows the current available adjustments and their normal ranges. Most deal with geometry and color temperature adjustments required after picture tube replacement or to satisfy consumer requirements. All other alignments and adjustments must be performed using Chipper Check, TCE's computer-based troubleshooting and alignment software. To enter the service menu with the instrument on, press and hold the MENU button. Then press and release the POWER button. Now press the VOLUME+ button, releasing both it and the MENU button at the same time. The on-screen display will now appear similar to Figure 9-21. The remainder of the procedure is identical to all previous TCE Service Menu procedures. V76 is still the security value to enter the service menu.
CH
VOL
VOL
MENU/OK
CH
POWER
Figure 9-20, MM101 Front Panel Assembly
P 0 000 6.03
V 00
P 0 000 6.03
V 76
Figure 9-21, Service Menu Display Invalid Parameter Values TECH As with any adjustment on most television chassis, some parameters in the front TIP panel menu may be adjusted such that improper operation or loss of video display may occur. If the technician is using Chipper Check, operation is easily restored by remembering what parameter was changed. However, if the technician is using the front panel menu and loses video, there will be no way to recover without using Chipper Check. The following adjustments could cause particular problems. l l l l Vertical Slope MSB: Incremented too high causes loss of vertical scan (and, of course OSD) Vertical Scan Start: Similar to Vertical Slope MSB Comb D/A: Decremented too low causes loss of video AKB Mode: Values 00 and 03 are factory use only! Video and OSD will be lost.
System Control
Pa ra me te r #
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
135
Pa ra me te r N a me
Erro r Detectio n (1 st) Erro r Detectio n (2 nd ) Erro r Detection (last) Ho rizo ntal Phase Wid th Align Wid th E/W P a rab o la E/W Trap E/W C o rner Vertical C enter. Vertical Amp Align Vertical Amp Delta Vertical C enter O ffset Vertical Mo vie Mode Vertical S lo p e MS B Vertical Slope LS B Vertic a l S tart S c an Red C uto ff (N o rmal 9 30 0 °) Green C uto ff (N o rmal 9 3 0 0 °) Blue C uto ff (N o rmal 9 3 0 0 °) S ub C o ntrast Green/Red Drive S elect (N o rmal 9 30 0 °) Green/Red Drive (N o rmal 9 3 0 0 °) Blue Drive (N ormal 9300°) YUV Light O utp ut (N o rmal 9 3 0 0 °) RGB Light O utp ut (N o rmal 9 3 0 0°) Red C uto ff (Warm 6500°) Green C uto ff (Warm 6500°) Blue C uto ff (Warm 6 5 0 0°) Green/Red Drive S elect (Warm 6500°)
Va lue R a ng e
N o te s /Co mme nts /N omina l Va lue s
00 . . 63 00 .. 63 00 .. 63 00 .. 63 00 .. 07 00 . . 63 00 . . 07 00 . . 63 00 .. 15 00 . . 63 00 . . 03 00 .. 255 00 . . 255 00 .. 63 00 .. 255 00 .. 255 00 .. 255 0 0 .. 3 1 0 0 .. 0 1 00 .. 127 00 . . 127 00 .. 127 00 .. 127 00 . . 255 00 . . 255 00 .. 255 0 0 .. 0 1 0=N o rmal; 1=Mo vie1; 2=Movie2; 3= Mo vie3 N o te: C hanges VerticalAmpDelta EEPRO M, and Updates VerticalAmp
Figure 9-22, Service Menu Adjustments
136
System Control
31 32 33 34 Green/Red Drive (Warm 65 0 0°) Blue Drive (Warm 6 5 0 0°) YUV Light O utp ut (N o rmal 9 3 0 0 °) RGB Light O utp ut (N o rma l 9 3 0 0°) 00 .. 127 00 .. 127 00 .. 127 00 .. 127
35
YUV C utoff (YUV Brightness Align)
00 .. 255
36
RGB C uto ff (RGB Brightness Align)
00 .. 127
37
AK B Mo d e
01 .. 02
S ee N o te 1 fo r d eta ils.
38
C o mb D/A
00 .. 127
39
F P IP C o ntra st
00 .. 127
40
F PIP C o arse Tint (C o mp o site)
00 .. 07
41
F P IP F ine Tint (C o mp o site )
00 .. 255
42
F P IP S aturatio n (C o mp osite )
00 .. 127
43
F PIP C o a rse Tint (S Vid eo )
00 .. 07
44
F P IP F ine Tint (SVid eo )
00 .. 255
45
F PIP S atura tio n (S Vid eo )
00 .. 127
N O TE: Although 0 0 & 0 3 ma y b e ente re d , the y are no t le ga l field service values and may ca use lo ss o f vid eo .
Figure 9-22, Service Menu Adjustments (Continued)
Figure 9-23, Chipper Check Connector Location
System Control
137
Error Codes Under normal conditions, failure of an IIC device will prevent the set from turning on and also log an error code in the first three parameter locations of the service menu. These error codes and their meaning will be discussed later. Because a possible reason for service is a failed bus device, the normal microprocessor routine to check for IIC device acknowledgment is disabled in the service mode. As with previous chassis, the MM101 logs error codes in the EEPROM during certain failure scenarios. In general, there will be an error code for each IIC bus device, plus a few other devices. When one of these devices fail, an error code will be stored in the EEPROM. There is room for three failure codes. These are the first error, the second error and the last error. Because the first two error code locations do not update continuously, there is no way of knowing exactly when the error occurred. Note that the first two error locations do not update upon continuous errors, only the last one. Because they do not, there is no way to know exactly when the errors occurred. However the third location will always have the latest code. It is good practice to write the three codes down, then "zero" the error code locations. Then attempt to start the set normally and let it again update the error code list. Now a fresh set of error codes will be available to the technician. (See the Chipper Check Section for more details.) If an error code matches one in the following table, then that device did not acknowledge a microprocessor command. For example, if error code 13 is logged, a FAN DETECT error has been detected. The technician would then narrow troubleshooting efforts around that device. Initial efforts would include the basic "goes-in-to's & goes-out-as" plus verification of supply power. In some cases, an error code may not be included in the table. If the error code read, is a listed code incremented by one, a read error from that device is indicated. For example, if the error code is 136, the TVB IC or associated circuitry is at fault. If the error code is 137, the read register of the TVB did not respond. Failure of the TVB, or TVB circuitry might still be indicated. In these cases, IC failure, or failure of supply power to the IC is indicated more than associated circuitry. Other error codes may indicate a failure condition in different areas of the chassis, such as the cooling fans and power supplies. It is important to understand how these error codes are detected by the system control circuitry so they can be interpreted correctly and used as clues leading to successful servicing.
TECH TIP
138
System Control Many error codes will also place the set in "Power Fatal" mode. They are noted in Figure 9-24. This means the microprocessor will always perform the "three strikes, you're out" routine. After the initial failure, system control will attempt to restart the set twice. If the second attempt (third shutdown) to restart is unsuccessful, the micro will shut the set down and override any operator attempt to restart. At this point, the set can only be restarted by using the service mode, which ignores any error code shutdown. The "Power Fatal" mode indicates whether the fault will perform a "Three Strikes, You're Out" routine. Always indicates that the fault condition will always cause the routine to run. Maybe indicates it will when "Power Fatal" mode is enable. This would occur under normal operation, but not during service mode. Never indicates the fault will not cause a shutdown routine to run. The error codes are separated into two categories; IIC devices and Power On faults. Power On faults are generally non-IIC devices, but can include some IIC devices if they fail the initial Power On Reset (POR) command. The micro will generally log errors due to lack of acknowledgment of a requested write or read command.
TECH TIP
If the problem is one that does not seem to allow a service mode override, Chipper Check, TCE's software based troubleshooting and alignment software, is able to read the EEPROM error code locations. However, the +5V standby supply must be operational.
Generally, it can be stated that if an error code is noted in the service mode and is not listed in this error code list, it could be an invalid number due some software glitch, or it could be an active device read error. All IIC devices have a corresponding write and read error code, plus confirmation of the event. For example, error 160 refers to the main EEPROM and indicates a write command that the micro was unable to verify properly executed. 161 indicates the micro requested information or a status condition from the EEPROM, but was unable to read it. Also note that some error codes seem to indicate two different device errors. Upon closer inspection, the two devices share an error code, but are on separate bus lines. There is no way at this time to differentiate the two. Both should be regarded as defective until one can be eliminated. Under certain circumstances, the +15V standby supply can drop out, the set will shut down intermittently or even go through a "batten down the hatches" routine. It is possible that no error code will be logged. If the complaint is intermittent shutdown and no error codes are shown, monitor the +15V standby supply, associated circuits and any devices powered by this supply.
TECH TIP
Chipper Check Please refer to the section of this manual outlining Chipper Check operation with TCE products. Most alignments will be handled using Chipper Check. All service menu alignments and adjustments are also included and can be performed using Chipper Check. Except for color temperature and screen geometry adjustments, Chipper Check is the preferred method for all service diagnosis and adjustments.
System Control
139
E rro r C o de
0 1 3 9 7 10 11 12 13 16 18 20 6 44 52/53 64/65 66/67 68 72/73 128/129 134 136 136 140 160/161 164/167 164/167 168/169 186/187 192 194 196 198
Po we r Fa t a l
Yes Yes Yes Yes Yes Maybe Maybe Maybe Yes Yes Yes Yes Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe Maybe
Erro r
Power Fail Initial Power Fail +12V Run Video IC Scan Loss F2PIP POR Stereo Decoder AVR Latched Fan Stopped IIC Run1 or Run2 Bus Error IIC Standby Bus Software Stack Overflow S-Video Switch F2PIP IC USB Hub IC PIP IF DAC Main Tuner DAC Deflection DAC SYNC Proc Stereo Decoder Composite AV Switch NTSC Decoder TVB Deflection Processor I/O EEPROM Main Tuner EEPROM Deflection EEPROM 2nd Tuner EEPROM OSD IC PIP Tuner PLL PIP IF DAC Main Tuner PLL Main IF DAC
B us
---RUN 1 -RUN 1 RUN 2 -----RUN 1 RUN 1 USB RUN 2 RUN 1 RUN 2 RUN 2 RUN 1 RUN 1 RUN 1 RUN 2 RUN 2 STDBY RUN 1 RUN 2 RUN 2 RUN 1 RUN 2 RUN 2 RUN 1 RUN 1
D e vice
+15V Standby +12V Run Dropout +12V Run Monitor U22300 Deflection U18100 U31701
C o ndi t i o n
Check +15Vs Supply Check +12V Run Check +12V Run Regulation IC or Supply Failure Loss of Scan IC or Supply Failure IC or Supply Failure AVR Active Fan or Fan Detect Circuit Failure IIC clock or data failure IIC clock or data failure Various Conditions. Reset system. IC or Supply Failure IC or Supply Failure IC, Supply or USB downstream device failure IC or Supply Failure IC or Supply Failure IC Failure IC or Supply Failure IC or Supply Error IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure IC or Supply Failure
U13101 U13101 U13101 U13101 U16500 U18100 U13201 U27902 U32602 U24800 U38300 U31701 U16501 U22300 U11800 U14350 U13102 U32601 U14354 U27903 U13202 U17401 U27902 U25501 U32602
Figure 9-24, MM101 Error Codes
140
System Control Power Sequence Timing In order to prevent damage to circuitry, the microprocessor follows a specific routine to administer power to the chassis. The hardware startups surrounding these routines must occur exactly or the set will either fail to start, or shut down catastrophically. Power Control This sequence occurs when AC power is first applied to the chassis. The microprocessor begins at an 8 MHz clock speed instead of the normal run speed of 16 MHz. It will not switch to fast speed until after all ports and peripherals have initialized. This sequence is also used during a reset condition. Reset may be requested by the microprocessor after determining some system error that is not recognized as correctable by the software.
RESET
RESET OUT
OFF/ON
OFF
EEPROM ENABLE
Disabled
CLOCK SPEED
8 MHz
16 MHz
T0
T1
T2
T3
T4
T5
T6
Figure 9-25, Power Up/Reset Timing Once AC power is applied, (or a reset condition is determined by the micro), the timing sequence is as follows; T0 is the time required for the micro to reset either after the application of AC power, or after a reset condition: normally 8 milliseconds. The RESET line transitions from inactive to active, the RESET OUT line is inactive, OFF/ON is undefined and ignored, EEPROM ENABLE is active and the clock speed is low. T1 is 10-15 msecs and allows any EEPROM writes to finish. T2 disables any EEPROM writes and waits 10-12 msecs to see if the EEPROM power supply is decaying. T3 waits 1-2 msec for the EEPROM supply to stabilize. T4 is a 12 msec delay just before the micro internal clock switches to 16 MHz. T5 16MHz clock is enabled and software begins to check chassis conditions. The IR receiver and display drivers are initialized. The ATE mode is strobed to see if it is being requested and all other interrupts are setup. RAM and user registers are zeroed and a wait state is reached until the POWER FAIL input is OK.
System Control T6 The "batten" information is read from the EEPROM, OFF/ON is set to OFF and all software modules are initialized in preparation for turn on. If shutdown was not operator initiated, the 15 second timer is read. If it is OK, the set is automatically turned back on. If it is not, the OFF state is set. Power Turn On The power turn on sequence may be initiated three different ways, but involves the same commands and software routine. The Power Control sequence must have been completed prior to the turn on sequence being requested. If it has not, the turn on command will be ignored. The operator may begin turn on by requesting it either through the front panel button or via a remote control command. Additionally, the DPMS allows a user turn on to be initiated by the presence of horizontal and vertical sync on either VGA connector. This would come from a computer connected to the MM101. Power turn on may also be initiated automatically by the 15 second timer, explained previously. During turn on, the "three strike's, you're out" watchdog is in effect. Three attempts may be made to reach successful turn on within a minute before the chassis shuts down in Power Fatal mode. Typical problems preventing completion of the turn on sequence are: Failure of the +12V run supply to stabilize above 80% of normal regulation, Failure of the micro to autodetect the deflection controller within 400 msec, No IIC run bus communications after successful completion of both of the above, Any other POWER FATAL error.
141
OFF/ON AutoDetect U14350
2H VCC
FSS nitialize 14350 & U24800 Blank Video Audio Mute
Scan Loss Detect Enable an Detect nable +12 V Run Detect Enable T0 T1 T2 T3 T4 T5 T6 T7 T8
Figure 9-26, Turn on Timing
142
System Control T0 is typically 4.5 msec. During this time, the off/on line switches to on, the display drivers and user interface are initialized and software checks auto setup to see if it has ever been performed. T1 varies from 20 to 400 msec for the +12V run supply to rise above 80% of its normal operating voltage and for the deflection controller to be recognized. During T2, about 25 msec, U24800, the Deflection Controller is reset. T3 is a 20-25 msec system delay. T4: Initialize U24800 & U32602, the main tuner DAC. T5: 85 msec system delay. T6: Turn on Horizontal Output, LFSS (Line Frequency Start-Stop). T7: Initialize the 2H power based on current video mode. Initialize F2PIP, Video control, and the video (VGA Sync) bus expander. Enable Scan Loss Detect, +12V Run Detect and Periodic Refresh. This time period is about 300 msec. T8: Wait approximately 6000 msec for the fan detect circuitry to stabilize. Once the turn on sequence is complete, certain operational integrity monitors are enable to ensure everything operates within specifications. These are: Scan Loss interrupt Fan Detect +12V Run Supply Detect, sampled periodically.
Power Fail One of the most important functions of the software routine is to monitor the supply voltages and anticipate unexpected power shut downs. This prevents an unorganized shutdown avoiding hardware failure when devices do not shut down in the proper order. How the microprocessor monitors the system for a power fail indication has been discussed. Once a Power Fail has been asserted, either from the Power Supplies or Deflection hardware, system control has 10 msecs to shut down the run supplies and the USB supply. If this is successful, with all loads but the microprocessor and EEPROM removed, there will be about 100 msecs of standby supply available before it also falls out of regulation. System control may then write the "Batten Down the Hatches" information to the main EEPROM.
System Control
POWER FAIL
143
2H VCC
Video Blanking USB Power Supply
LFSS
OFF/ON Scan Loss Detect Enable Fan Detect Enable
EEPROM Enable T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11
Figure 9-27, Power Fail Shutdown Timing The following table outlines the timing chart above.
Time T0 T1 T2 T3 T4 T5 T6 Description Wait until interupts are enabled Wait for end of current EEPROM byte writes. Stop IIC communications Disable Fan Detect & Scan Loss Detect. Blank OSD Turn off 2H Vcc Disable USB downstream Ports Turn off Horizontal Scan System Delay. Set Off/On to Off Initialize Micro Data Ports, Disable Data Slicer. Set Clock to 8MHz. Turn off all micro A/D and PWM ports. Wait for last EEPROM write to finish. Disable EEPROM write. Wait for EEPROM supply to stabilize Write "Batten" data to EEPROM Wait for supplies to fail Typical Duration (msec) 1.5 0.5 2.0 1.5 2.0 3.0 0.5
T7
13
T8 T9 T10 T11
13.3 1.3 8.4 100
Figure 9-28, Power Fail Timing Chart Power Fail Timing is critical! It is possible that the power supplies will not drop as there will be no loss of AC. The power fail command will be initiated by hardware failure of one of those circuits. In this case, the micro begins the sequence from T2. If the supplies are not dropping by T11, the micro will wait indefinitely in the routine. Since POWER FAIL was never asserted, the micro must be forced into a reset routine, or chassis power must be disconnected to end the routine.
144
System Control VGA Mode Switching When the MM101 is switched to computer display mode (VGA), it must decide what video mode is being input from the computer's video card. Deflection circuits must be properly set and picture controls must be adjusted to present the best information display possible. The microprocessor receives a command to switch to computer display mode by the operator. The mode switching circuitry then evaluates the incoming signal and sets the proper mode to display it. After the initial change, the microprocessor looks at the incoming VGA signal on a regular basis to make certain it has not changed. If a mode change is indicated, the deflection controller is moved to an "idle" state, then the turn on sequence is initiated with several important differences. First, it is assumed the +12V run supply is valid and the deflection controller is working properly. Also, since most of the IC's do not require initialization during a VGA mode change, only the video controller and deflection controller are reset to the new mode.
2H Vcc
LFSS Initialize U14350 & U24800
Video Blanking Audio Muting Scan Loss Detect Enable T0 T1 T2 T3 T4 T5
Figure 9-29, VGA Mode Switch Timing T0 is the initial detection of a mode change. Supply voltage to the deflection controller is removed and the audio and video is muted to prevent audio noise and to keep video from attempting to draw beam current. Scan Loss detect is also turned off to prevent the micro from shutting the set down when it shuts down deflection. This normally happens in about 85 msecs. T1 is a system delay of about 15 msec. T2 initializes U14350, the deflection controller and U24800, the deflection DAC. T3 is a system delay of about 25 msec. T4 begins the turn on of horizontal (LFSS) output signal, about 55 msec. T5 initializes the 2H VCC, the video sync controller and enables periodic refresh.
System Control Power Turn Off Power turn off is normally initiated by a user Turn Off command from the front panel or remote control, however, DPMS support allows an external computer command to initiate the sequence by noting the loss of horizontal and vertical VGA sync.
145
OFF/ON
2H VCC
LFSS
Video Blanking
Audio Mute
Speaker Mute
Fan Detect Enable Scan Loss Detect Enable T0 T1 T2 T3
Figure 9-30, Power Turn Off Timing The power turn off sequence is very simple, but affects all circuitry. It must occur in the exact order or error codes will be logged. The problem is those errors could be anything so it would not indicated a power turn off sequence error, only hardware related to the failure. The actual off command to disable the run supplies happens long after the initial command to shut down the chassis. During T0, a 15 msec time period immediately following a turn off command, OSD is blanked, audio is gradually decreased to 0 db, the F2PIP IC is shut down, Video switching is disabled, the tuner is shut down and the low level scan generator is turned off, disabling deflection and high voltage. Also, if the chassis happens to be in service test mode, that software routine is terminated. During the next 200 msec, T1, speaker muting is applied to prevent annoying audio pops as the run supplies begin to die. T2 in about 1 msec sets LFSS to Stop, all the microprocessor PWM outputs and sets the Off/On output switch to Off. T3 is a system delay of 2 seconds to ignore a turn on command until the turn off sequence is complete and all supplies have decayed enough to allow normal turn on. This completes the power turn off cycle.