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TDA1771
VERTICAL DEFLECTION CIRCUIT
s s s s s s s
RAMP GENERATOR INDEPENDENT AMPLITUDE ADJUSTEMENT BUFFER STAGE POWER AMPLIFIER FLYBACK GENERATOR INTERNAL REFERENCE VOLTAGE THERMAL PROTECTION SIP10 (Plastic Package) Figure 1. PIN CONNECTIONS (Top View)
10 9 8 7 6 5 4 3 2 1 FLYBACK GENERATOR VS INVERTING INPUT BUFFER OUTPUT RAMP GENERATOR GROUND HEIGHT ADJUSTMENT TRIGGER INPUT OUTPUT STAGE V S POWER OUTPUT
DESCRIPTION The TDA1771 is a monolithic integrated circuit in SIP10 package. It is a full performance and very efficient vertical deflection circuit intended for direct drive of a TV picture tube in Color and B & W television as well as in Monitor and Data displays.
Figure 2. BLOCK DIAGRAM
9 2
VOLTAGE REGULATOR
FLYBACK GENERATOR
10
R3
TRIGGER IN
3
RAMP GENERATOR
CLOCK PULSE
POWER AMP.
1
BUFFER STAGE
THERMAL PROTECTION
4
6
7
8
5
September 2003
This is preliminary information on a new product now in development. Details are subject to change without notice.
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TDA1771
ABSOLUTE MAXIMUM RATINGS
Symbol VS V1,V2 V3 V8 I0 I0 I10 I10 Ptot TS,TJ Parameter Supply Voltage Flyback Peak Voltage Trigger Input Voltage Amplifier Input Voltage Output Peak to Peak Current (non repetitive t = 2ms) Output Peak to Peak Current t > 10µs Pin 10 DC Current at V1 < V9 Pin 10 Peak to Peak Current @ tfly < 1.5ms Total Power Dissipation @ Ttab = 60°C Storage and Junction Temperature Value 30 65 20 GNDtoVS 6 4 100 3 9 - 40, + 150 Unit V V V V A A mA A W °C
THERMAL DATA
Symbol Rth (j-tab) Rth (j-a) Parameter+ Thermal Resistance Junction-tab Thermal Resistance Junction-ambient Max. Max. Value 10 70 Unit °C/W °C/W
ELECTRICAL CHARACTERISTICS (Tamb = 25°C unless otherwise specified)
Symbol DC(VS=30V) I2 I9 -I6 -I6 dI6/I6 V1 V1L V1H V4 dV4/VS dV4/dI4 Vr Gv Vfs V10 V3 I3 t3 Parameter Pin 2 Quiescent Current Pin 9 Quiescent Current Ramp Generator Bias Current Ramp Generator Current Ramp Gener. Linearity Quiescent Output Voltage Out Saturation Voltage to GND Out Saturation Voltage to VS Reference Voltage Reference Voltage Drift Versus Reference Voltage Drift Versus Internal Ref. Voltage Ouput Stage Open Loop Gain V9 - 10 Saturation Voltage Pin 10 Scanning Voltage Trigger Input Threshold Trigger Input Bias Current Trigger Input Width TestConditions I1 = 0, I10 = 0 I1 = 0, I10 = 0 V6 = 0 V6 = 0, - I4 = 20µA V6 = 0 to 15V, - I4 = 20µA Ra = 30k, Rb = 10k, VS = 30V Ra = 6.8k, Rb = 10k, VS = 15V I1 = 0.5A I1 = 1.2A - I1 = 0.5A - I1 = 1.2A - I4 = 20µA VS = 10V to 30V I4 = 10µA to 30µA f = 100Hz - I10 = 1.2A I10 = 20mA (see note 1) VIN = V3 - 0.2V (see note 2) Min. Typ. Max. 36 30 0.5 18.5 20 21.5 0.2 1 17.0 17.8 18.6 7.2 7.5 7.8 0.5 1 1 1.4 1.1 1.6 1.6 2.2 6.3 6.6 6.9 1 2 1.5 2 4.26 4.40 4.54 60 1.5 2.5 1.7 3 2.6 3.0 3.4 30 20 60 th 16 15 Unit mA mA µA µA % V V V V V V V mV/V mV/µA V dB V V V µA µS
VS I4
Notes: 1. The trigger input circuit can accept, with a metal option, positive and negative going pulses. 2. th = 1.2 t S where tS is the vertical period and VPP is ramp amplitude at Pin 6.
----------------V PP
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ELECTRICAL CHARACTERISTICS (Tamb = 25°C unless otherwise specified)
Symbol DC (VS = 24V) VS I1 IS V1 V7 TJS Parameter Operating Supply Voltage Range Peak-to-peak Operating Current Range Supply Current Flyback Voltage Sawtooh Pedestall Voltage Junction Temp. for Thermal Shutdown Test Conditions Min. 10 0.4 IY = 2.4App IY = 2.4App 315 51 1.85 145 Typ. Max. 30 2.5 Unit V A mA V V °C
APPLICATION CIRCUIT
+VS
0.1µF 470µF 1N4001
9
2 100µF 35V
VOLTAGE REGULATOR
FLYBACK GENERATOR
10
R3
TRIGGER IN
3
RAMP GENERATOR
CLOCK PULSE
POWER AMP.
1
2.2 330
BUFFER STAGE
THERMAL PROTECTION
0.22µF
Ry = 9.6 YOKE Ly = 24.6mH Iy = 1.2App
2.4k
4
6 47nF
7
8
5
1.2k
1k
22µF
1500µF
180k
220k
1.2
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PACKAGE MECHANICAL DATA 10 PINS - PLASTIC SIP Figure 3. 10-Pin Plastic Single in Line Package
Dim.
C c2 L3
mm Min 2.7 0.5 0.85 3.3 0.43 1.32 23.7 14.5 2.54 22.86 3.1 3 17.6 0.25 3.2 1 10 0.122 1.5 0.033 Typ Max 7.1 3 24.8 0.106 Min
inches Typ Max 0.280 0.118 0.976 0.020 0.063 0.130 0.017 0.052 0.933 0.571 0.100 0.900 0.118 0.693 0.010 0.126 0.039
A a1 B b1
D
L1
N d1 M
b3 C c1 c2
A
L2
D d1
1 10
e e3 L
L
a1
b1 b3 e3 B e c1
L1 L2 L3 M N
Number of Pins
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without the express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics ©2003 STMicroelectronics - All Rights Reserved. Purchase of I2C Components by STMicroelectronics conveys a license under the Philips I2C Patent. Rights to use these components in an I2C system is granted provided that the system conforms to the I2C Standard Specification as defined by Philips. STMicroelectronics Group of Companies Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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