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INTEGRATED CIRCUITS
DATA SHEET
TEA6360 5-band stereo equalizer circuit
Preliminary specification File under Integrated Circuits, IC01 May 1991
Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
FEATURES · Monolithic integrated 5-band stereo equalizer circuit · Five filters for each channel · Centre frequency, bandwidth and maximum boost/cut defined by external components · Choise for variable or constant Q-factor via I2C software · Defeat mode · All stages are DC-coupled · I2C-bus control for all functions · Two different modul addresses programmable. GENERAL DESCRIPTION
TEA6360
The 5-band stereo equalizer is an 12C-bus controlled tone processor for application in car radio sets, TV sets and music centres. It offers the possibility of sound control as well as equalization of sound pressure behaviour of different rooms or loudspeakers, especially in cars.
QUICK REFERENCE DATA SYMBOL Vp Ip V1,32 Vo Gv B Tamb supply voltage (pin 14) supply current input voltage range maximum output signal level (RMS value, pins 13 and 20) total signal gain, all filters linear -1 dB frequency response (linear) operating ambient temperature PARAMETER 7 - - 1.1 -0.5 0 to 20 -40 - - - - 0 - 85 V dB kHz °C MIN. TYP. 8.5 24.5 2.1 to VP-1 - V - MAX. 13.2 V mA UNIT
ORDERING INFORMATION EXTENDED TYPE NUMBER TEA6360(1) TEA6360/T(2) Notes 1. SOT232; SOT232-1; 1996 August 08. 2. SOT287; SOT287-1; 1996 August 08. PACKAGE PINS 32 32 PIN POSITION shrink DIL mini-pack MATERIAL plastic plastic CODE SOT232 SOT287
May 1991
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
TEA6360
May 1991
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Fig.1 Block diagram, test and application circuit.
Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
PINNING SYMBOL ViL F1LA n.c. F1LB F2LA F2LB F3LA F3LB F4LA F4LB F5LA F5LB VoL VP SDA SCL GND2 MAD GND1 VoR F5RB F5RA F4RB F4RA F3RB F3RA F2RB F2RA F1RB n.c. F1RA ViR PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DESCRIPTION audio frequency input LEFT connection A for filter 1 LEFT (f = 2.95 kHz) not connected connection B for filter 1 LEFT (f = 2.95 kHz) connection A for filter 2 LEFT (f = 12 kHz) connection B for filter 2 LEFT (f = 12 kHz) connection A for filter 3 LEFT (f = 790 Hz) connection B for filter 3 LEFT (f = 790 Hz) connection A for filter 4 LEFT (f = 205 Hz) connection B for filter 4 LEFT (f = 205 Hz) connection A for filter 5 LEFT (f = 59 Hz) connection B for filter 5 LEFT (f = 59 Hz) audio frequency output LEFT supply voltage (+8.5 V) I2C-bus data line I2C-bus clock line ground 2 (I2C-bus ground) modul address ground 1 (analog ground) audio frequency output RIGHT connection B for filter 5 RIGHT (f = 59 Hz) connection A for filter 5 RIGHT (f = 59 Hz) connection B for filter 4 RIGHT (f = 205 Hz) connection A for filter 4 RIGHT (f = 205 Hz) connection B for filter 3 RIGHT (f = 790 Hz) connection A for filter 3 RIGHT (f = 790 Hz) connection B for filter 2 RIGHT (f = 12 kHz) connection A for filter 2 RIGHT (f = 12 kHz) connection B for filter 1 RIGHT (f = 2.95 kHz) not connected connection A for filter 1 RIGHT (f = 2.95 kHz) audio frequency input RIGHT
TEA6360
Fig.2 Pin configuration
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
FUNCTIONAL DESCRIPTION The TEA6360 is performed with two stereo channels (RIGHT and LEFT), each one consists of five equal filter amplifiers (Fig.1). The centre frequencies for the different filters as well as the bandwidth and the control ranges for boost and cut depend on the external components. Each filter can have different external components but for one definite pair of filters the centre frequency as well as the control range for boost and cut are the same. That means, they have symmetrical curves for boost and cut. The control range (maximum value in dB) is divided into five steps and one extra step for the linear position. At maximum gain of 12 dB the typical step resolution is 2.4 dB. The internal resistor chain of each filter amplifier is optimized for 12 dB maximum gain. Therefore the typical gain factors for 15 dB application are as follows:
TEA6360
The position of the filter in the left channel and that in the right channel is always the same (stereo). The position of the boost part and the cut part is independently controllable (Tables 2 and 3). The quality factor of the filter has its maximum in the maximum position (steps 5), if boost (cut on step 0) or cut (boost on step 0) is used. The quality factor decreases also with the step number (variable quality factor). In this mode the control pattern are according to Table 4. A different control is necessary to achieve a constant quality factor over the whole control range. For boost with a constant quality factor over the boost range position +5 is selected and boost control is then performed using cut. This control technique is applied to the cut range with position -5 selected and the boost is varied (Table 5). The cut part has to follow the boost part in each filter for economic reasons. So the signal is first amplified and then attenuated. This has to be taken into account for the internal level diagram in case of constant quality factor. This may result in a mode between constant Q and non-constant Q mode; for example for the position +2 it is not necessary to amplify by step +5 and then attenuate by -3 step. The combination of step +4 and step -2 to reach position +2 is a good result (quasi constant quality factor, Table 6).
step 1 step 2 step 3 step 4 step 5
= 2.7 = 5.5 = 8.4 = 11.6 = 15.0
dB dB dB dB dB
The control of the different filters is obtained by selecting the appropriate subaddress byte (Table 1). LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). Ground pins 19, 28 and 43 connected together. SYMBOL VP Vn Ptot Tstg Tamb VESD Note 1. Equivalent to discharging a 200 pF capacitor through a 0 series resistor. supply voltage (pin 14) voltage on all pins, grounds excluded total power dissipation storage temperature range storage temperature range operating ambient temperature range electrostatic handling(1) for all pins PARAMETER 0 0 0 -40 -40 -40 MIN. VP 500 150 150 85 ±500 MAX. 13.2 V V mW °C °C °C V UNIT
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
TEA6360
CHARACTERISTICS VP = 8.5 V; fi = 1 kHz (RS = 600 ), RL = 10 k, Tamb = 25 °C and measurements taken in Fig.1, unless otherwise specified. SYMBOL VP IP PARAMETER supply voltage. range (pin 14) supply current (pin 14) VP = 8.5 V VP = 12 V Analog part Ri V1,32 V13,20 Vo input resistor (pins 1 and 32) input voltage range at any stage output voltage range at any stage output signal level (RMS value, pins 13 and 20) Ro RL CL Gv B output resistor (pins 13 and 20) admissable load resistance at outputs (pins 13 and 20) admissable load capacitance at outputs (pins 13 and 20) total signal gain (G = Vo / Vi) frequency response minimum value maximum value Cr crosstalk attenuation between channels all filters linear all filters maximum boost all filters maximum cut THD distortion (pins 13 and 20) Vo (rms) = 1.1 V Vo (rms) = 0.1 V Vo (rms) = 1.1 V Vo (rms) = 0.1 V Vo (rms) = 0.1 V Vo (rms) = 1 V f = 20 to 12500 Hz VP = 8.5 to 12 V all fIlters linear all fIlters linear all fIlters max. boost all fIlters max. boost all fIlters maximum cut all fIlters max. boost f = 1 kHz - - 0.35 % - - - - - 0.2 0.05 0.5 0.1 0.2 0.5 0.2 1.0 0.3 0.5 % % % % % f = 250 to 10000 Hz 60 55 55 75 - - - - - dB dB dB all filters linear all filters linear, roll off frequency for -1 dB (DC-coupled) 0 20 - - - - Hz kHz - -0.5 - - 2.5 0 nF dB 2 - - k control range 0 to +5, variable Q-factor or quasi constant Q-factor 1.1 - - 100 - - V 1 2.1 to VP -1 1.0 to VP -1 - - V - - V - - M CONDITIONS 7 - - MIN. TYP. 8.5 25.5 26.0 MAX. 13.2 - - UNIT V mA mA
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
TEA6360
SYMBOL VN (RMS value) defeat mode
PARAMETER weighted output noise voltage
CONDITIONS CCIR 468-3, maximum gain/filter of 12 dB - - - - all filters linear all filters linear - - -
MIN.
TYP.
MAX.
UNIT
8 23 70 23 120 70 60
16 46 140 46 - - -
µV µV µV µV dB dB dB
all filters linear all filters maximum boost all filters maximum cut Cr RR crosstalk between bus inputs and signal outputs, 20 log (Vbus(p-p)/Vo rms) ripple rejection at Vripple rms < 200 mV for f = 100 Hz for f = 40 to 12500 Hz Internal filters of analog part Q Q-factor dependent on maximum gain maximum gain 10 dB maximum gain 12 dB maximum gain 15 dB Rtot Rtot total resistor of different filter sections tolerance between any filter section
0.1 0.1 0.1 29.6 - - - maximum gain 12 dB - - -
- - - 37.0 -
1.2 1.4 1.8 44.4 ±4 - - - - ±10 dB dB mV k %
Internal controls of analog part via I2C-bus Step number of steps for boost or for cut position for linear step resolution step set error Vo DC offset between any step or neighbouring step or defeat I2C-bus control SDA and SCL (pins 15 and 16) VIH VlL II VACK VIH VIL II input level HIGH input level LOW input current acknowledge voltage on SDA l15 = 3 mA at LOW 3 0 - - - - - - - - - - 5.0 6.0 VP 1.5 ±10 0.4 V V µA V - 5 1 2.4 0.5
Module address bit (pin 18) input level HIGH for address 1000 0110 input level LOW for address 1000 0100 input current 3 0 - - 4.2 5.2 Vp 1.5 ±10 V V µA
Power on reset: When reset is active the DEF-bit (defeat) is set and the I2C-bus receiver is in reset position. RESET start of reset end of reset increasing VP decreasing VP increasing VP 2.5 5.8 6.8 V V V
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
TEA6360
Fig.3
Frequency response for maximum boost of +12 dB according to Fig.1. For maximum cut the curves are symmetrical to negative gain values.
Fig.4 Application for car radio (Vp < 8.5 V).
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
I2C-BUS PROTOCOL I2C-bus format S SLAVE ADDRESS A SUBADDRESS A DATA
TEA6360
P
S SLAVE ADDRESS A SUBADDRESS DATA P
= = = = = =
start condition 1000 0100 when pin 18 is set LOW or 1000 0110 when pin 18 is set HIGH or open-circuit acknowledge, generated by the slave subadress byte, see Table 1 data byte, see Table 1 stop condition
If more than 1 byte DATA are transmitted, then auto-increment of the subaddress is performed. Byte organisation Table 1 I2C-bus transmission DATA BYTE FUNCTION filter 1/defeat filter 2 filter 3 filter 4 filter 5 0 0 0 0 0 SUBADDRESS BYTE D7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 DEF 0 0 0 0 D6 1B2 2B2 3B2 4B2 5B2 D5 1B1 2B1 3B1 4B1 5B1 D4 1B0 2B0 3B0 4B0 5B0 D3 0 0 0 0 0 D2 1C2 2C2 3C2 4C2 5C2 D1 1C1 2C1 3C1 4C1 5C1 D0 1C0 2C0 3C0 4C0 5C0
Function of the bits of Table 1: 1B0 1B0 2B0 2B0 3B0 3B0 4B0 4B0 5B0 5B0 DEF to to to to to to to to to to 1B2 1B2 2B2 2B2 3B2 3B2 4B2 4B2 5B2 5B2 boost control for filter 1 cut control for filter 1 boost control for filter 2 cut control for filter 2 boost control for filter 3 cut control for filter 3 boost control for filter 4 cut control for filter 4 boost control for filter 5 cut control for filter 5 DEF = 0 (defeat bit): DEF = 1: All filters operating. Linear frequency response, input is directly connected to the output of the output amplifier. The filter settings are stored but the internal amplification is controlled to 0 dB, independent on bits nB2 to nB0.
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
Table 2 Boost control for filter n DATA POSITION step 0 step 1 step 2 step 3 step 4 step 5 step 5 step 5 Table 4 (maximum boost) (maximum boost) (maximum boost) (no boost) nB2 0 0 0 0 1 1 1 1 nB1 0 0 1 1 0 0 1 1 nB0 0 1 0 1 0 1 0 1 step 0 step 1 step 2 step 3 step 4 step 5 step 5 step 5 (maximum cut) (maximum cut) (maximum cut) POSITION (no cut) Table 3 Cut control for filter n DATA nB2 0 0 0 0 1 1 1 1
TEA6360
nB1 0 0 1 1 0 0 1 1
nB0 0 1 0 1 0 1 0 1
Filter control with variable quality factor D7 POSITION X nB2 1 1 0 0 0 0 0 0 0 0 0 nB1 0 0 1 1 0 0 0 0 0 0 0 nB0 1 0 1 0 1 0 0 0 0 0 0 X 0 0 0 0 0 0 0 0 0 0 0 nC2 0 0 0 0 0 0 0 0 0 1 1 nC1 0 0 0 0 0 0 0 1 1 0 0 nC0 0 0 0 0 0 0 1 0 1 0 1 (+5) (+4) (+3) (+2) (+1) (+0) (+0) (+0) (+0) (+0) (+0) + + + + + + + + + + + (-0) (-0) (-0) (-0) (-0) (-0) (-1) (-2) (-3) (-4) (-5) = = = = = = = = = = = +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 D6 D5 D4 D3 D2 D1 D0 COMMENT 0 0 0 0 0 (linear) 0 0 0 0 0 (maximum cut) 0
+5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5
(maximum boost)
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
Table 5 Filter control with constant quality factor D7 POSITION X +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 Table 6 (maximum cut) (linear) (maximum boost) 0 0 0 0 0 0 0 0 0 0 0 nB2 1 1 1 1 1 0 1 0 0 0 0 nB1 0 0 0 0 0 0 0 1 1 0 0 nB0 1 1 1 1 1 0 0 1 0 1 0 X 0 0 0 0 0 0 0 0 0 0 0 nC2 0 0 0 0 1 0 1 1 1 1 1 nC1 0 0 1 1 0 0 0 0 0 0 0 nC0 0 1 0 1 0 0 1 1 1 1 1 (+5) (+5) (+5) (+5) (+5) (+0) (+4) (+3) (+2) (+1) (+0) + + + + + + + + + + + D6 D5 D4 D3 D2 D1 D0
TEA6360
COMMENT (-0) (-1) (-2) (-3) (-4) (-0) (-5) (-5) (-5) (-5) (-5) = = = = = = = = = = = +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5
Filter control with quasi-constant quality factor D7 POSITION X nB2 1 1 1 1 0 0 0 0 0 0 0 nB1 0 0 0 0 1 0 1 1 1 0 0 nB0 1 1 1 0 1 0 0 0 0 1 0 X 0 0 0 0 0 0 0 0 0 0 0 nC2 0 0 0 0 0 0 0 1 1 1 1 nC1 0 0 1 1 1 0 1 0 0 0 0 nC0 0 1 0 0 0 0 1 0 1 1 1 (+5) (+5) (+5) (+4) (+3) (+0) (+2) (+2) (+2) (+1) (+0) + + + + + + + + + + + (-0) (-1) (-2) (-2) (-2) (-0) (-3) (-4) (-5) (-5) (-5) = = = = = = = = = = = +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 D6 D5 D4 D3 D2 D1 D0 COMMENT 0 0 0 0 0 (linear) 0 0 0 0 0 (maximum cut) 0
+5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5
(maximum boost)
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
PACKAGE OUTLINES SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)
TEA6360
SOT232-1
D seating plane
ME
A2 A
L
A1 c Z e b 32 17 b1 w M (e 1) MH
pin 1 index E
1
16
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 4.7 A1 min. 0.51 A2 max. 3.8 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 29.4 28.5 E (1) 9.1 8.7 e 1.778 e1 10.16 L 3.2 2.8 ME 10.7 10.2 MH 12.2 10.5 w 0.18 Z (1) max. 1.6
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT232-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-04
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
TEA6360
SO32: plastic small outline package; 32 leads; body width 7.5 mm
SOT287-1
D
E
A X
c y HE v M A
Z 32 17
Q A2 A1 pin 1 index Lp 1 e bp 16 w M L detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 0.02 0.01 c 0.27 0.18 0.011 0.007 D (1) 20.7 20.3 0.81 0.80 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.2 1.0 0.047 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.95 0.55 0.037 0.022
0.012 0.096 0.004 0.086
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT287-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-25
May 1991
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). SDIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating REPAIRING SOLDERED JOINTS
TEA6360
method. Typical reflow temperatures range from 215 to 250 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: · A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. · The longitudinal axis of the package footprint must be parallel to the solder flow. · The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
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Philips Semiconductors
Preliminary specification
5-band stereo equalizer circuit
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TEA6360
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
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