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INTEGRATED CIRCUITS DATA SHEET TEA6360 5-band stereo equalizer circuit Preliminary specification File under Integrated Circuits, IC01 May 1991 Philips Semiconductors Preliminary specification 5-band stereo equalizer circuit FEATURES · Monolithic integrated 5-band stereo equalizer circuit · Five filters for each channel · Centre frequency, bandwidth and maximum boost/cut defined by external components · Choise for variable or constant Q-factor via I2C software · Defeat mode · All stages are DC-coupled · I2C-bus control for all functions · Two different modul addresses programmable. GENERAL DESCRIPTION TEA6360 The 5-band stereo equalizer is an 12C-bus controlled tone processor for application in car radio sets, TV sets and music centres. It offers the possibility of sound control as well as equalization of sound pressure behaviour of different rooms or loudspeakers, especially in cars. QUICK REFERENCE DATA SYMBOL Vp Ip V1,32 Vo Gv B Tamb supply voltage (pin 14) supply current input voltage range maximum output signal level (RMS value, pins 13 and 20) total signal gain, all filters linear -1 dB frequency response (linear) operating ambient temperature PARAMETER 7 - - 1.1 -0.5 0 to 20 -40 - - - - 0 - 85 V dB kHz °C MIN. TYP. 8.5 24.5 2.1 to VP-1 - V - MAX. 13.2 V mA UNIT ORDERING INFORMATION EXTENDED TYPE NUMBER TEA6360(1) TEA6360/T(2) Notes 1. SOT232; SOT232-1; 1996 August 08. 2. SOT287; SOT287-1; 1996 August 08. PACKAGE PINS 32 32 PIN POSITION shrink DIL mini-pack MATERIAL plastic plastic CODE SOT232 SOT287 May 1991 2 Philips Semiconductors Preliminary specification 5-band stereo equalizer circuit TEA6360 May 1991 3 Fig.1 Block diagram, test and application circuit. Philips Semiconductors Preliminary specification 5-band stereo equalizer circuit PINNING SYMBOL ViL F1LA n.c. F1LB F2LA F2LB F3LA F3LB F4LA F4LB F5LA F5LB VoL VP SDA SCL GND2 MAD GND1 VoR F5RB F5RA F4RB F4RA F3RB F3RA F2RB F2RA F1RB n.c. F1RA ViR PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DESCRIPTION audio frequency input LEFT connection A for filter 1 LEFT (f = 2.95 kHz) not connected connection B for filter 1 LEFT (f = 2.95 kHz) connection A for filter 2 LEFT (f = 12 kHz) connection B for filter 2 LEFT (f = 12 kHz) connection A for filter 3 LEFT (f = 790 Hz) connection B for filter 3 LEFT (f = 790 Hz) connection A for filter 4 LEFT (f = 205 Hz) connection B for filter 4 LEFT (f = 205 Hz) connection A for filter 5 LEFT (f = 59 Hz) connection B for filter 5 LEFT (f = 59 Hz) audio frequency output LEFT supply voltage (+8.5 V) I2C-bus data line I2C-bus clock line ground 2 (I2C-bus ground) modul address ground 1 (analog ground) audio frequency output RIGHT connection B for filter 5 RIGHT (f = 59 Hz) connection A for filter 5 RIGHT (f = 59 Hz) connection B for filter 4 RIGHT (f = 205 Hz) connection A for filter 4 RIGHT (f = 205 Hz) connection B for filter 3 RIGHT (f = 790 Hz) connection A for filter 3 RIGHT (f = 790 Hz) co