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5
4
3
2
1
SYSTEM DC/DC
CADIZ-CP Block Diagram
Clock Generator
D
PROJECT CODE : 91.4JH01.001 PCB P/N : 48.4JH01.01M REVISION : 09941-1M
RT8223
INPUTS
5V_S5(9A) DCBATOUT
37
OUTPUTS
3D3V_S5(5A) 5V_AUX_S5
D
ICS9LVS3197BKLFT 3
3D3V_AUX_S5
DDRIII 800 DDRIII 800
Slot 0 21 Slot 1 22
DDRIII Channel A
Intel CPU
PCI EXPRESS GRAPHIC
X16
Thermal Sensor
GMT G787 30
DDRIII Channel B
SFF
4,5,..,10,11 FDIx8 DMIx4
ATI Park-S3/ M93-S3 58...62
RT8209
VRAM DDR3 1Gb*4 63...66 INPUTS
DCBATOUT
39 OUTPUTS
1D05V_S0(20A)
Int MIC
RT8209 CRT/B LVDS
38 OUTPUTS
1D5V_S3(13.5A)
Codec
Line Out
C
INPUTS
DCBATOUT
Realtek ALC275SQ 28
AZALIA
LCD
INTEL
RGB
19
CRT HDMI
25
RT9026
INPUTS
5V_S5
MIC In SPKR
1.5W
PCH
14 USB 2.0/1.1 ports ETHERNET (10/100/1000Mb)
36
C
PCIe USB Port x 1 CAMERA SIM USB USB Port x 2 Mini2 Card WWAN PCIe PCIe Mini 1 Card WLAN/ WIMAX Giga LAN
Atheros AR8131M
OUTPUTS
DDR_VREF_S3 1.2A
High Definition Audio 6 SATA ports
MS/MS Pro /MS Pro HG
SD/MMC Card
Cardreader
Ricoh R5U231
PCIe
8 PCIE ports ACPI 1.1 LPC I/F PCI/PCI BRIDGE
CHARGER
BQ24751 INPUTS
23
32
OUTPUTS CHG_PWR
18V 6.0A
MINI/B
DCBATOUT
Express Card
TPS2231 USB Blue Tooth
28
CPU DC/DC
ADP3211 INPUTS 36
B
1394
B
OUTPUTS
27A
CARDREADER/B
VCC_CORE DCBATOUT
FeliCa HDD SATA
24 Flash ROM 4MB 32
SATA SPI
32
VGA/ GFX Core
ADP3211 40
12,13,...,19,20
TXFM
RJ45
27
INPUTS
OUTPUTS
DCBATOUTVGA_CORE/
LPC
VCC_GFXCORE
11A
PCB STACKUP
TOP GND S S VCC S GND BOTTOM
5
KBC
L1 L2 L3 L4 L5 L6 L7 L8
Winbond
NPCE781L 31
SPI
A
Flash ROM 128KB 32
LPC
DEBUG CONN.32
SMbus ADDRESS
DIMM 1 DIMM 2 CLK GEN Thermal Sensor CHARGER BATTERY 1010 000x b 1010 001x b 1110 001x b 0101 110x b 0001 001x b 0001 110x b
2
Squirtle CP DIS SAMSUNG
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
Touch Pad 24
4
INT. KB 31
3
BLOCK DIAGRAM
Size A3 Date: Document Number Rev
CADIZ-CP
Saturday, April 24, 2010 Sheet
1
-1M
1 of 57
A
B
C
D
E
PCH Strapping
Name
SPKR
Processor Strapping
Schematics Notes
Pin Name
CFG[4]
Strap Description
Embedded DisplayPort Presence PCI-Express Static Lane Reversal PCI-Express Configuration Select Reserved Temporarily used for early Clarksfield samples.
4
INIT3_3V# GNT3#/ GPIO55 INTVRMEN GNT0#, GNT1#
Reboot option at power-up Default Mode: Internal weak Pull-down. No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k - 10-k weak pull-up resistor. Weak internal pull-down. Do not pull high. Default Mode: Internal pull-up. Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k pull-down resistor).
Configuration (Default value for each bit is 1 unless specified otherwise)
1: Disabled - No Physical Display Port attached to Embedded DisplayPort. 0: Enabled - An external Display Port device is connected to the Embedded Display Port. 1: Normal Operation. 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ... 1: Single PCI-Express Graphics 0: Bifurcation enabled Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor Note: Only temporary for early CFD samples (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common motherboard design (for AUB and CFD), the pull-down resistor should be used. Does not impact AUB functionality.
Default Value
1
4
CFG[3] weak CFG[0]
1
1
GNT2#/ GPIO53 GPIO33
High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled Default (SPI): Left both GNT0# and GNT1# floating. No pull up required. Boot from PCI: Connect GNT1# to ground with 1-k pull-down resistor. Leave GNT0# Floating. Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-k pull-down resistor. Default - Internal pull-up. Low (0)= Configures DMI for ESI compatible operation (for servers only. Not for mobile/desktops). Default: Do not pull low. Disable ME in Manufacturing Mode: Connect to ground with 1-k pull-down resistor. Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull-up resistor. Disable iTPM: Left floating, no pull-down required. Enable Danbury: Connect to Vcc3_3 with 8.2-k weak pull-up resistor. Disable Danbury: Connect to ground with 4.7-k weak pull-down resistor. Weak internal pull-up. Do not pull low. Low (0): Flash Descriptor Security will be overridden. High (1) : Flash Descriptor Security will be in effect. Weak internal pull-down. Do not pull high. Weak internal pull-down. Do not pull high. Weak internal pull-down. Do not pull high. Weak internal pull-up. Do not pull low. Default = Do not connect (floating) High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.
CFG[7]
0
3
3
SPI_MOSI NV_ALE
NC_CLE HAD_DOCK_EN# /GPIO[33] HDA_SDO HDA_SYNC GPIO15 GPIO8 GPIO27
2
2
Resistor
100R2J-2-GP Before "R" is the Resistance ex: 100R=100 ohm; 49K9R=49.9K ohm 80D6R=80.6 ohm 2=0402 3=0603 5=0805 J=5% F=1% D=0.5% -GP=RoHS Part -PAD=no component just layout pad connected Serial #; Some parts no this #
Capacitor
SC4D7U10V5ZY-3GP 4D7U is the Capacitance ex:4D7U =4.7UF; SC100P=100PF 10V is the Rated Voltage -3GP is serial # and RoHS Part Tolerance ZY=Y5V MX=X5R KX=X5R JN=NPO
0=1210 2=0402 3=0603 5=0805 6=1206
1
Squirtle CP DIS SAMSUNG
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. C1 SC33P50V2JN-3GP
1
DY
2
Title
Reference
DY means de-populate
Size A3 Date: Document Number Rev
CADIZ-CP
Saturday, April 24, 2010 Sheet 2 of 57
-1M
5
4
3
2
1
1D5V_S0_CLKGEN
1
1
1
C1385 SC10U6D3V3MX-GP
C1383 SC1U10V2KX-1GP
C1384 SCD1U16V2ZY-2GP
1
C1386
2
2
2
2
D
PIN# 9LRS3197
1D5V_S0 R2669 1 0R0603-PAD 1D5V_S0_CLKGEN
1 3.3V
5 3.3V
15 1.05V~3.3V
17 3.3V
18 1.05V~3.3V
24 3.3V
29 3.3V
16 CPU_STOP#
SCD1U16V2ZY-2GP
D
2
9LVS3197
1.5V
3.3V
1.05V~1.5V
1.5V
1.05V~1.5V
1.5V
3.3V
NC
PVT 20100331
3D3V_S0
1 R2247 0R0603-PAD
2 1 1
C927 SCD1U16V2ZY-2GP C930 SC1U10V2KX-1GP
3D3V_CK505
14.31818M HZ
CL=10pF±0.2pF
GEN_XTAL_IN C933 SC12P50V2JN-3GP 2 1
C
1 2
SC10U6D3V3MX-GP
C929
C
1
2 R2246 0R0603-PAD
U86
X8 X-14D31818M-50GP
PVT 20100331
1 1
C1225 SC10U6D3V3MX-GP C1224 SC1U10V2KX-1GP SC1U10V2KX-1GP
3D3V_CK505_IO C1223 SCD1U16V2ZY-2GP
1 5 15 17 18 24 29
VDD96_1_5 VDD27_3_3 VDDPCIEX_IO_LV VDDPCIEX_1_5 VDDCPU_IO_LV VDDCPU_1_5 VDDREF_3_3 27FIX 27SS SCLK_3_3 SDATA_3_3 X1 X2 VTTPWRGD/PD#_3_3 REF/FSLC NC#16
9LVS3197BKLFT-GP
SATAT_LR SATAC_LR DOT96T_LR DOT96C_LR CPUT_LR0 CPUC_LR0 CPUT_LR1 CPUC_LR1 PCIEXT_LR PCIEXC_LR GND96 GND27 GNDSATA GNDPCIEX GNDCPU GNDREF GND
10 11 3 4 23 22 20 19 13 14 2 8 9 12 21 26 33
CLK_SATA 13 CLK_SATA# 13 DREFCLK 13 DREFCLK# 13 CLK_CPU_BCLK 13 CLK_CPU_BCLK# 13
100 MHz SATA
GEN_XTAL_OUT R2731
82.30005.A51 2nd = 82.30005.901
1 2
GEN_XTAL_OUT_1 0R0402-PAD
2
1
1D05V_S0
PVT 20100331
2
2
PVT 20100331
2
1
96 MHz 133-MHz
PCH CPU
3D3V_S0
C934 SC12P50V2JN-3GP
1
13,21,22 PCH_SMBCLK 13,21,22 PCH_SMBDATA
RN87 SRN0J-10-GP-U 2 1
EVT 20091207
3 4
2
2
2
6 7
PCH_SMBCLK_+ 32 PCH_SMBDATA_+ 31 GEN_XTAL_IN GEN_XTAL_OUT
CLK_DMI 13 CLK_DMI# 13
100 MHz
DMI
R2315 10KR2J-3-GP CLK_EN
2
B
1D05V_S0
14.318 MHz
2
R2250
13
CLK_ICH14 C935 SC4D7P50V2CN-1GP
33R2J-2-GP
2
R2249 1
CLK_EN FSC
25 30 16
DY
2
DY 2K2R2J-2-GP
1
EVT 20091209
D
1
1
28 27
EVT 20091209
B
. . . . .
G S
Q75 2N7002E-1-GP
71.93197.B03
FSC
84.2N702.D31 2ND = 84.2N702.E31
VR_CLKEN# 36
2
FSC
R2251 2K2R2J-2-GP
0 133MHz (Default)
1 100MHz
Squirtle CP DIS SAMSUNG
SPEED
1
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
A
Clock Generator
Size Custom Date:
5 4 3 2
Document Number
Rev
Saturday, April 24, 2010
CADIZ-CP
1
-1M
3 of 57
Sheet
5
4
3
2
1
D
D
CPU1A
1 OF 10
14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
F7 J8 K8 J4 F9 J6 K9 J2 H17 K15 J13 F10 G17 M15 G13 J11
DMI_RX#0 DMI_RX#1 DMI_RX#2 DMI_RX#3 DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3 DMI_TX#0 DMI_TX#1 DMI_TX#2 DMI_TX#3 DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3
PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9 PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15 PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8 PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15 PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9 PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15 PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8 PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15
B12 A13 D12 B11 G40 G38 H34 P34 G28 H25 H24 D29 B26 D26 B23 D22 A20 D19 A17 B14 F40 J38 G34 M34 J28 G25 K24 B28 A27 B25 A24 B21 B19 B18 B16 D15 N40 L38 M32 D40 A38 G32 B33 B35 L30 A31 B32 L28 N26 M24 G21 J20 L40 N38 N32 B39 B37 H32 A34 D36 J30 B30 D33 N28 M25 N24 F21 L20
PEG_IRCOMP_R EXP_RBIAS PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0 PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0 PEG_TXN15_L PEG_TXN14_L PEG_TXN13_L PEG_TXN12_L PEG_TXN11_L PEG_TXN10_L PEG_TXN9_L PEG_TXN8_L PEG_TXN7_L PEG_TXN6_L PEG_TXN5_L PEG_TXN4_L PEG_TXN3_L PEG_TXN2_L PEG_TXN1_L PEG_TXN0_L PEG_TXP15_L PEG_TXP14_L PEG_TXP13_L PEG_TXP12_L PEG_TXP11_L PEG_TXP10_L PEG_TXP9_L PEG_TXP8_L PEG_TXP7_L PEG_TXP6_L PEG_TXP5_L PEG_TXP4_L PEG_TXP3_L PEG_TXP2_L PEG_TXP1_L PEG_TXP0_L
1 1
R2252 2 49D9R2F-GP R2253 2 750R2F-GP PEG_RXN[15..0] 48
DMI DMI
PEG_RXP[15..0] 48
C
C
14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14
B
FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 FDI_FSYNC0 FDI_FSYNC1 FDI_INT FDI_LSYNC0 FDI_LSYNC1
L2 N7 M4 P1 N10 R7 U7 W8 K1 N5 N2 R2 N9 R8 U6 W10 AC7 AC9 AB5 AA1 AB2
FDI_TX#0 FDI_TX#1 FDI_TX#2 FDI_TX#3 FDI_TX#4 FDI_TX#5 FDI_TX#6 FDI_TX#7 FDI_TX0 FDI_TX1 FDI_TX2 FDI_TX3 FDI_TX4 FDI_TX5 FDI_TX6 FDI_TX7 FDI_FSYNC0 FDI_FSYNC1 FDI_INT FDI_LSYNC0 FDI_LSYNC1
PCI EXPRESS -- GRAPHICS
AUBURNDALE-1-GP-U3-NF
Intel(R) FDI
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
C397 C398 C506 C521 C508 C522 C510 C526 C528 C514 C530 C515 C531 C516 C518 C502 C399 C520 C505 C507 C523 C509 C511 C524 C525 C512 C527 C529 C513 C532 C517 C519
SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP SCD1U10V2KX-5GP
PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0 PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0
PEG_TXN[15..0] 48
B
PEG_TXP[15..0] 48
A
Squirtle CP DIS SAMSUNG
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
5 4 3 2
CPU SFF 1 of 8(DMI/FDI/PEG)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
4 of 57
5
4
3
2
1
1D05V_S0
CPU1B
2 OF 10
1 1
H_CATERR# 2 R2258 49D9R2F-GP PROCHOT# 2 R2259 68R2-GP
1 1
D
1 1
AD69 AE66 M71
Clocks
2 R2254 20R2F-GP 2 R2255 20R2F-GP 2 R2257 49D9R2F-GP 2 R2256 49D9R2F-GP
H_COMP3 H_COMP2 H_COMP1 H_COMP0
AD71 AC70
COMP3 COMP2 COMP1 COMP0 PROC_DETECT CATERR# BCLK BCLK# BCLK_ITP BCLK_ITP# PEG_CLK PEG_CLK# DPLL_REF_SSCLK DPLL_REF_SSCLK#
DPLL_REF_SSCLK DPLL_REF_SSCLK#
1 2
RN89 SRN0J-10-GP-U 4 3
EVT 20091207
AK7 AK8 K71 J70 L21 J21 Y2 W4
BCLK_CPU_P 17 BCLK_CPU_N 17
Misc Misc
CLK_EXP_P_R 13 CLK_EXP_N_R 13 DPLL_REF_SSCLK DPLL_REF_SSCLK#
H_CATERR#
N61
17
H_PECI
N19
SM_DRAMRST# SM_RCOMP0 SM_RCOMP1 SM_RCOMP2
BJ12 BV33 BP39 BV40 AV66 AV64
SM_DRAMRST# 17 SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
PECI
EVT 20091207 EVT 20091204 RN90
1 2
SRN10KJ-5-GP 4 3
If supports integrated graphics but without Embedded DisplayPort(eDP), these pins can also be connected to GND directly.
D
Thermal Thermal
1D05V_S0
17,33 PM_THRMTRIP-A#
DVT 20100210
DDR3 Misc
31 H_PROCHOT#
R2305 1
2 0R2J-2-GP
PROCHOT#
N67
PROCHOT#
PM_EXT_TS#0 PM_EXT_TS#1
PM_EXTTS#0_R 21 PM_EXTTS#1_R 22
N17
THERMTRIP#
SM_RCOMP_0
1 R2260 1 R2261 1 R2262
2 100R2F-L1-GP-U 2 24D9R2F-L-GP 2 130R2F-1-GP
PRDY# PREQ# N70
14 H_PM_SYNC
C
U71 U69 T67 N65 P69 T69 T71 P71 T70 W71 J69 J67 J62 K65 K62 J64 K69 M69
SM_RCOMP_1 SM_RCOMP_2 XDP_TRST# RN91 XDP_TDO XDP_TDI_TDO_M SRN51J-GP XDP_DBRESET# XDP_DBRESET# 1D05V_S0
RESET_OBS#
M17
PM_SYNC
TCK TMS TRST# TDI TDO TDI_M TDO_M DBR# BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7
Power Management Power Management
1 2
4 3
3D3V_S0
C
17
H_PW RGD
AM7 Y67 AM5 H15 Y70
VCCPWRGOOD_1 VCCPWRGOOD_0 SM_DRAMPWROK VTTPWRGOOD TAPPWRGOOD RSTIN#
JTAG & MBP
From PCH
EVT 20091211
16,26,27,31,32,33,48 PLT_RST# 14 PM_DRAM_PW RGD 39 H_VTTPW RGD
1 R2306
2 1KR2J-1-GP
R2801 1
2
PLT_RST#_R
G3
1K5R2F-2-GP
1
R2802 750R2F-GP
AUBURNDALE-1-GP-U3-NF
B
2
B
R2760 PM_DRAM_PW RGD 1
2
PM_DRAM_PW RGD_1
1K5R2F-2-GP
S3
1D5V_S3 1D5V_S0_DDR 3D3V_S5 R2762 1K1R2F-GP
1
R2761 1K1R2F-GP
1
U137 33,42 1D5V_S0_PW RGD
NON_S3
2 2
PM_DRAM_PW RGD
DY
S3
VCC 5 4
PM_DRAM_PW RGD_1
1 2
B A Y GND
1
3
R2763 750R2F-GP
74LVC1G08GW -1-GP
NON_S3: 3Kohm S3: 750ohm
S3/ NON_S3
2
73.01G08.L04 2ND = 73.01G08.L03
A
Squirtle CP DIS SAMSUNG
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
5 4 3 2
CPU SFF 2 of 8(CLK/Thermal)
Document Number Saturday, April 24, 2010
Rev
CADIZ-CP
Sheet
1
-1M
5 of 57
5
4
3
2
1
CPU1D CPU1C 3 OF 10
4 OF 10
22 M_B_DQ[63..0] 21 M_A_DQ[63..0]
D
C
B
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
AT8 AT6 BB5 BB9 AV7 AV6 BE6 BE8 BF11 BE11 BK5 BH13 BF9 BF6 BK7 BN8 BN11 BN9 BG17 BK15 BK9 BG15 BH17 BK17 BN20 BN17 BK25 BH25 BJ20 BH21 BG24 BG25 BJ40 BM43 BF47 BF48 BN40 BH43 BN44 BN47 BN48 BN51 BH53 BJ55 BH48 BJ48 BM53 BN55 BF55 BN57 BN65 BJ61 BF57 BJ57 BK64 BK61 BJ63 BF64 BB64 BB66 BJ66 BF65 AY64 BC70
SA_CK0 SA_CK#0 SA_CKE0 SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
BM34 BP35 BF20
M_CLK_DDR0 21 M_CLK_DDR#0 21 M_CKE0 21
SA_CK1 SA_CK#1 SA_CKE1
BK36 BH36 BK24
M_CLK_DDR1 21 M_CLK_DDR#1 21 M_CKE1 21
SA_CS#0 SA_CS#1
BH40 BJ47
M_CS0# 21 M_CS1# 21
SA_ODT0 SA_ODT1
BF43 BL47
M_ODT0 21 M_ODT1 21
SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7
BB10 BJ10 BM15 BN24 BG44 BG53 BN62 BH59
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DM[7..0] 21
DDR SYSTEM MEMORY - B
SA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7
AY5 BJ7 BN13 BL21 BH44 BK51 BP58 BE62
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_A_DQS#[7..0] 21
SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
AY7 BJ5 BL13 BN21 BK44 BH51 BM60 BE64
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_A_DQS[7..0] 21
21 21 21
M_A_BS_0 M_A_BS_1 M_A_BS_2
BT38 BH38 BF21
SA_BS0 SA_BS1 SA_BS2
21 21 21
M_A_CAS# M_A_RAS# M_A_W E#
BK43 BL38 BF38
SA_CAS# SA_RAS# SA_WE#
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
BT36 BP33 BV36 BG34 BG32 BN32 BK32 BJ30 BN30 BF28 BH34 BH30 BJ28 BF40 BN28 BN25
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_A[15..0] 21
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
BA2 AW2 BD1 BE4 AY1 BC2 BF2 BH2 BG4 BG1 BR6 BR8 BJ4 BK2 BU9 BV10 BR10 BT12 BT15 BV15 BV12 BP12 BV17 BU16 BP15 BU19 BV22 BT22 BP19 BV19 BV20 BT20 BT48 BV48 BV50 BP49 BT47 BV52 BV54 BT54 BP53 BU53 BT59 BT57 BP56 BT55 BU60 BV59 BV61 BP60 BR66 BR64 BR62 BT61 BN68 BL69 BJ71 BF70 BG71 BC67 BK70 BK67 BD71 BD69
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
SB_CK0 SB_CK#0 SB_CKE0 SB_CK1 SB_CK#1 SB_CKE1
BU33 BV34 BT26 BV38 BU39 BT24
M_CLK_DDR2 22 M_CLK_DDR#2 22 M_CKE2 22 M_CLK_DDR3 22 M_CLK_DDR#3 22 M_CKE3 22
D
SB_CS#0 SB_CS#1
BP46 BT43
M_CS2# 22 M_CS3# 22
SB_ODT0 SB_ODT1
BV45 BU49
M_ODT2 22 M_ODT3 22
SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7
BB4 BL4 BT13 BP22 BV47 BV57 BU65 BF67
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_B_DM[7..0] 22
DDR SYSTEM MEMORY A
SB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7
BE2 BM3 BU12 BT19 BT52 BV55 BU63 BG69
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_DQS#[7..0] 22
C
SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
BD4 BN4 BV13 BT17 BT50 BU56 BV62 BJ69
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_B_DQS[7..0] 22
22 22 22 22 22 22
M_B_BS_0 M_B_BS_1 M_B_BS_2 M_B_CAS# M_B_RAS# M_B_W E#
BV43 BV41 BV24 BU46 BT40 BT41
SB_BS0 SB_BS1 SB_BS2 SB_CAS# SB_RAS# SB_WE#
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
BT34 BP30 BV29 BU30 BV31 BT33 BT31 BP26 BV27 BT27 BU42 BU26 BT29 BT45 BV26 BU23
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_A[15..0] 22
B
AUBURNDALE-1-GP-U3-NF
A
AUBURNDALE-1-GP-U3-NF
Squirtle CP DIS SAMSUNG
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
5 4 3 2
CPU SFF 3 of 8(DDR)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
6 of 57
5
4
3
2
1
1D05V_S0 CPU1F 6 OF 10 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 AW14 AW12 AU60 AU59 AU12 AR60 AR59 AR12 AN60 AN59 AN35 AN33 AN17 AN15 AN14 AN12 AM10 AL60 AL59 AL17 AL15 AL14 AL12 AK35 AK33 AF39 AF37 AF35 AF33 AF32 AF30 AD39 BF60 BF59 BD60 BD59 BB60 BB59 AY60 AW60 AW35 AW33 AD37 AD35 AD33 AD32 AD30 W35 W33 W32 W30 W28 W26 W24 W23 U35 U33 U32 U30 U28 U26 U24 U23 R35 R33 R32 R30 R28 R26 R24 R23 AY10 AN9
1
1
1
1
1
1
1
1
1
C1226 SC1U6D3V2KX-GP
C1227 SC1U6D3V2KX-GP
C1228 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1229 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1230 SC1U6D3V2KX-GP
C1231 SC1U6D3V2KX-GP
C1232 SC1U6D3V2KX-GP
C1233 SCD1U10V2KX-5GP SCD1U10V2KX-5GP
C1234 SC1U6D3V2KX-GP
1
C1235 SCD1U10V2KX-5GP
D
D
36 CPU_Core_VID[6..0]
36 CPU_Core_VID0 CPU_Core_VID1 CPU_Core_VID2 CPU_Core_VID3 CPU_Core_VID4 CPU_Core_VID5 CPU_Core_VID6
PSI#
PSI#
F68 A61 D61 D62 A62 B63 D64 D66 AN1
PSI# VID0 VID1 VID2 VID3 VID4 VID5 VID6 VTT_SELECT1 PROC_DPRSLPVR
2
2
2
2
2
2
2
2
2
1.1V RAIL POWER
EVT 20091201
36 PM_DPRSLPVR
F66
1
1
1
1
1
1
1
1
C1236 SCD1U10V2KX-5GP
C1237 SC1U6D3V2KX-GP
C1239 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1240 SC1U6D3V2KX-GP
C1241 SC1U6D3V2KX-GP
C1242 SC1U6D3V2KX-GP
C1243 SCD1U10V2KX-5GP SCD1U10V2KX-5GP
C1244 SC1U6D3V2KX-GP
1 2
2
2
2
2
2
2
2
2
36
IMVP_IMON
A41
ISENSE
36 36
C
VCC_SENSE VSS_SENSE 39 VTT_SENSE
F64 F63 N13 R12
DVT 20100209
VCC_SENSE VSS_SENSE VTT_SENSE VSS_SENSE_VTT
2
1
1
1
1
1
1
2
2
2
2
2
2
DY
DY
1D8V_S0
C1253 SC10U6D3V3MX-GP
C1254 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
2
B
2
W39 W37 U37 R39 R37
VCCPLL VCCPLL VCCPLL VCCPLL VCCPLL
POWER
1
1
2
1
CPU VIDS CPU VIDS SENSE LINES SENSE LINES
C1245 SC1U6D3V2KX-GP
C
C1246 SC10U6D3V3MX-GP SC10U6D3V3MX-GP
C1247 SC10U6D3V3MX-GP
C1248 SC10U6D3V3MX-GP
C1249 SC10U6D3V3MX-GP
C1250 SC10U6D3V3MX-GP SC10U6D3V3MX-GP
C1251 SC10U6D3V3MX-GP
C1252 SC10U6D3V3MX-GP
1.8V 1.8V
B
1D5V_S3 1 2 VDDQ_CK BB14 BB12 C947 SC1U6D3V2KX-GP VDDQ_CK1 VDDQ_CK2
Please note that the VTT Rail Values are Auburndale VTT=1.05V; Clarksfield VTT=1.1V
1
L60 IND-1UH-2-GP
1D05V_S0 VTT0_AY10 VTT0_AN9 0R3J-0-U-GP 0R3J-0-U-GP 2 2 1 R2544 1 R2545
2
AUBURNDALE-1-GP-U3-NF Squirtle CP DIS SAMSUNG
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom
A
CPU SFF 4 of 8(POWER/VTT)
Document Number
CADIZ-CP
Sheet
1
Rev
-1M
7 of 57
Date: Saturday, April 24, 2010
5 4 3 2
5
4
3
2
1
VCC_GFXCORE
CPU1G
7 OF 10 1D5V_S3
D
2
2
2
UMA UMA UMA UMA UMA UMA UMA UMA
SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP
NON_S3
GFX_VID[6..0]
40
R2764 0R3J-0-U-GP
R2766 0R3J-0-U-GP
NON_S3
R2767 0R3J-0-U-GP
NON_S3
2
C1255
C1266
C1256
C1267
C1268
C1257
C1269
C1258
C1270
C1259 SC1U6D3V2KX-GP
C1260 SC1U6D3V2KX-GP
C1261 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1262 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1263 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1264 SC4D7U6D3V2MX-GP SC4D7U6D3V2MX-GP
C1265 SC4D7U6D3V2MX-GP SC4D7U6D3V2MX-GP
UMA UMA UMA UMA UMA UMA UMA UMA
2 2 2 2 2 2 2 2
C1280
C
- 1.5V RAILS
2
UMA
EVT 20091221
AN32 AN30 AN28 AN26 AN24 AN23 AN21 AN19 AL32 AL30 AL28 AL26 AL24 AL23 AL21 AL19 AK14 AK12 AJ10 AH14 AH12 AF28 AF26 AF24 AF23 AF21 AF19 AF17 AF15 AF14 AD28 AD26 AD24 AD23 AD21 AD19 AD17 W21 W19 U21 U19 U17 U15 U14 U12 R21 R19 R17 R15
VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1
SENSE LINES
VAXG_SENSE VSSAXG_SENSE
1
1
1
1
1
1
1
1
AF12 AF10
VCC_AXG_SENSE 40 VSS_AXG_SENSE 40 R2765 0R3J-0-U-GP
D
NON_S3
2
2
2
2
2
2
2
2
GRAPHICS VIDs
GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6 GFX_VR_EN GFX_DPRSLPVR GFX_IMON VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VTT0_DDR VTT0_DDR VTT0_DDR VTT0_DDR VTT0_DDR VTT0_DDR VTT0_DDR VTT0_DDR VTT0_DDR VTT0_DDR VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1
AF71 AG67 AG70 AH71 AN71 AM67 AM70 AH69 AL71 AL69 BU40 BU35 BU28 BN38 BM25 BL30 BJ38 BH32 BH28 BG43 BF16 BF15 BD35 BD33 BD32 BD30 BD28 BD26 BD24 BD23 BD21 BD19 BD17 BD15 BB35 BB33 BB32 BB30 BB28 BB26 BB24 BB23 BB21 BB19 BB17 BB15 AW32 AW30 AW28 AW26 AW24 AW23 AW21 AW19 AW17 AW15 AD15 AD14 AD12 AB12 AA12 W17 W15 W14 W12
GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6
EVT 20091117
1
1
1
1
1
1
1
1
1
1
1
GFX_VR_EN 40 1 GFX_IMON 40
TP188 TPAD14-GP
1D5V_S0_DDR
1
1
1
1
1
1
1
1
1
C1271 SC1U6D3V2KX-GP
C1272 SC1U6D3V2KX-GP
C1273 SC1U6D3V2KX-GP
C1274 SC1U6D3V2KX-GP
C1275 SC1U6D3V2KX-GP
C1276 SC10U6D3V3MX-GP
C1277 SC10U6D3V3MX-GP
C1278 SC10U6D3V3MX-GP
C1279 SC10U6D3V3MX-GP
1 2
TC48 ST330U2D5VBM-GP ST330U2D5VBM-GP
2
2
2
2
2
2
2
2
1
2
1
GRAPHICS GRAPHICS
DY
DY
DY
C
VCC_GFXCORE
DDR3
1D05V_S0
1
2
2
2
2
2 D
R669 0R2J-2-GP
R668 0R2J-2-GP
R685 0R2J-2-GP
R695 0R2J-2-GP
C1283 SC10U6D3V3MX-GP
C1284 SC10U6D3V3MX-GP
C1285 SC10U6D3V3MX-GP
C1286 SC1U6D3V2KX-GP
C1287 SC1U6D3V2KX-GP
POWER
1
1
1
1
1
SC10U6D3V3MX-GP SC10U6D3V3MX-GP
EVT 20091204
S3
R2768 220R2F-GP
PEG & DMI
PM_SLP_S3_CTL_D
DIS
DIS
DIS
DIS
. . . . .
G S
S3
Q90 2N7002E-1-GP
1
1
1
1
2
2
2
2
EVT 20091214
B
2
VCAP2
AK62 AK60 AK59 AH60 AH59 AF60 AF59 AD60 AD59 AB60 AB59 AA60 AA59 W60 W59 U60 U59 R60 R59
14,21,33,42 PM_SLP_S3_CTL 1D05V_S0
VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2 VCAP2
84.2N702.D31 B 2ND = 84.2N702.E31
1 1
C1288 SC1U6D3V2KX-GP SC1U6D3V2KX-GP C1289 SC1U6D3V2KX-GP SC1U6D3V2KX-GP C1290 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
2
2
2
1
1D05V_S0
1
1
1
1
1
2
2
2
2
2
1
1
1
1
C967 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C968 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C969 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C970 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
1
C971 SC1U6D3V2KX-GP
2
2
2
2
2
AUBURNDALE-1-GP-U3-NF
A
Squirtle CP DIS SAMSUNG
2
1
C1291 SC10U6D3V3MX-GP
C1292 SC10U6D3V3MX-GP
C1293 SC10U6D3V3MX-GP
C1294 SC10U6D3V3MX-GP
C1295 SC1U6D3V2KX-GP
C1296 SC1U6D3V2KX-GP
A
Do not dummy these CAPs
Title Size A3 Date:
5 4 3 2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
CPU SFF 5 of 8(PWR/DDR/GFX/)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
8 of 57
5
4
3
2
1
CPU1H VCAP0
8 OF 10
VCC_CORE
C977 SC1U6D3V2KX-GP
C986 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C987 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C980 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
D
C981 SC1U6D3V2KX-GP
C988 SC1U6D3V2KX-GP
C984 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C989 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
EVT 20091209
BD55 BD51 BD48 BB55 BB51 BB48 AY57 AY53 AY50 AW57 AW53 AW50 AU55 AU51 AU48 AR55 AR51 AR48 AN57 AN53 AN50 AL57 AL53 AL50 AK57 AK53 AK50
VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0 VCAP0
POWER
CPU CORE SUPPLY
Processor package decoupling DO NOT connect to any power rail
C
VCAP1
C996 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C997 SC1U6D3V2KX-GP
C998 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C999 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1000 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1001 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1002
C1003 SC1U6D3V2KX-GP
C1004 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1005 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1006 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1007 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
B
BD44 BD41 BD37 BB44 BB41 BB37 AY46 AY42 AY39 AW46 AW42 AW39 AU44 AU41 AU37 AR44 AR41 AR37 AN46 AN42 AN39 AL46 AL42 AL39 AK46 AK42 AK39
VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1 VCAP1
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
AF57 AF55 AF53 AF51 AF50 AF48 AF46 AF44 AF42 AF41 AD55 AD51 AD48 AD44 AD41 AB55 AB51 AB48 AB44 AB41 AA55 AA51 AA48 AA44 AA41 W55 W51 W48 W44 W41 U55 U51 U48 U44 U41 R55 R51 R48 R44 R41 P60 N55 N51 N48 N44 N42 M60 M51 M44 L55 K60 K51 K44 J55 H60 H51 H44 G60 G55 G51 G44 F55 E60 E57 E53 E50 E46 E42 D59 D57 D55 D54 D52 D50 D48 D47 D45 D43 B60 B56 B53 B49 B46 B42 A57 A54 A50 A47 A43
1
1
1
1
1
1
1
1
1
1
1
C1297 SC1U6D3V2KX-GP
C1320 SC1U6D3V2KX-GP
C1298 SC1U6D3V2KX-GP
C1299 SC1U6D3V2KX-GP
C1300 SC1U6D3V2KX-GP
C1301 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1302 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1303 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1304 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1321 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1305 SC1U6D3V2KX-GP
1 2
C1306 SC1U6D3V2KX-GP
2
2
2
2
2
2
2
2
2
2
1
1
1
2
2
2
2
1
2
D
1
1
1
1
1
1
1
1
1
1
C1307 SC1U6D3V2KX-GP
C1308 SC1U6D3V2KX-GP
C1309 SC1U6D3V2KX-GP
C1310 SC1U6D3V2KX-GP
C1311 SC1U6D3V2KX-GP
C1312 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1315 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1316 SC1U6D3V2KX-GP SC1U6D3V2KX-GP
C1317 SC1U6D3V2KX-GP
C1318 SC1U6D3V2KX-GP
1 2
C1319 SC1U6D3V2KX-GP
2
2
2
2
2
2
2
2
2
1
1
1
1
EVT 20091214
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
SC10U6D3V3MX-GP SC10U6D3V3MX-GP
1
C1322
C1323
C1324
C1325
C1326
C1327
C1328
C1329
C1330
C1331
C1332
2
C1333
C1334
C1335
C1336
C1337
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC10U6D3V3MX-GP
SC10U6D3V3MX-GP SC10U6D3V3MX-GP
C
1
1
1
1
1
2
2
2
2
2
1
1
1
1
1
2
2
2
2
2
2
1
2
1
B
AUBURNDALE-1-GP-U3-NF
A
Squirtle CP DIS SAMSUNG
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
5 4 3 2
CPU SFF 6 of 8(CPUCORE)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
9 of 57
5
4
3
2
1
CPU1E
5 OF 10 RSVD#W66 RSVD#W64 RSVD#AC69 RSVD#AC71 RSVD#AA71 RSVD#AA69 W66 W64 AC69 AC71 AA71 AA69 R66 R64
D
D
CFG0 1 R2264 3KR2F-GP 2
PCI-Express Configuration Select
DY
CFG0 CFG3 CFG4
C
AL4 AM2 AK1 AK2 AK4 AJ2 AT2 AG7 AF4 AG2 AH1 AC2 AC4 AE2 AD1 AF8 AF6 AB7
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17
RSVD#R66 RSVD#R64
CFG0
1:Single PEG 0:Bifurcation enabled
RSVD_NCTF#BT5 RSDV_NCTF#BR5 RSDV_NCTF#BV6 RSDV_NCTF#BV8 RSVD#AV69 RSVD#AK71 RSVD#AN69 RSVD#AP66 RSVD#AH66 RSVD#AK66 RSVD#AR71 RSVD#AM66 RSVD#AK69 RSVD#AU71 RSVD#AT70 RSVD#AR69 RSVD#AU69 RSVD#AT67 RSVD_TP2 RSVD_TP1 RSVD#AV4 RSVD#AU2 RSVD#BE69 RSVD#BE71
BT5 BR5 BV6 BV8 AV69 AK71 AN69 AP66 AH66 AK66 AR71 AM66 AK69 AU71 AT70 AR69 AU69 AT67 AP2 AN7 AV4 AU2 BE69 BE71
B
CFG3 1 R2265 3KR2F-GP 2
CFG3 - PCI-Express Static Lane Reversal CFG3 1 :Normal Operation 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
C
CFG4 1 R2546 3KR2F-GP 2
CFG4 - Display Port Presence
DY
RESERVED
AU1 T4 T2 U1 V2
B
RSVD_TP0 RSVD#T4 RSVD#T2 RSVD#U1 RSVD#V2 RSVD#AV71 RSVD#AW70 RSVD#AY69 RSVD#BB69 RSVD#D8 RSVD#B7 RSVD#A10 RSVD#B9 RSVD_NCTF#C5 RSVD_NCTF#A6 RSVD_NCTF#E3 RSVD_NCTF#F1
CFG4
1:Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port
AV71 AW70 AY69 BB69 D8 B7 A10 B9 C5 A6 E3 F1
A
NCTF_DC_TEST#BV71 NCTF_DC_TEST#BV69 NCTF_DC_TEST#BV68 NCTF_DC_TEST#BV5 NCTF_DC_TEST#BV3 NCTF_DC_TEST#BV1 NCTF_DC_TEST#BT71 DC_TEST_BT69 DC_TEST_BT3 NCTF_DC_TEST#BT1 NCTF_DC_TEST#BR71 NCTF_DC_TEST#BR1 NCTF_DC_TEST#E71 NCTF_DC_TEST#E1 NCTF_DC_TEST#C71 DC_TEST_C69 NCTF_DC_TEST#C3 NCTF_DC_TEST#A71 NCTF_DC_TEST#A69 NCTF_DC_TEST#A68 NCTF_DC_TEST#A5
NCTF TEST PIN: A5,A68,A69,A71,C3,C71,E1,E71,BR1,BR71, BT1,BT71,BV1,BV3,BV5,BV68,BV69,BV71
BV71 BV69 BV68 BV5 BV3 BV1 BT71 BT69 BT3 BT1 BR71 BR1 E71 E1 C71 C69 C3 A71 A69 A68 A5
1
TP149 TPAD14-GP
1
TP150 TPAD14-GP
1
TP151 TPAD14-GP TP152 TPAD14-GP
Squirtle CP DIS SAMSUNG
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A4
A
CPU SFF 7 of 8(RESERVED)
Document Number
CADIZ-CP
Sheet 10
1
Rev
AUBURNDALE-1-GP-U3-NF
5 4 3
-1M
of 57
Date: Saturday, April 24, 2010
2
5
4
3
2
1
CPU1I
9 OF 10
D
C
B
A
BU62 BU58 BU55 BU51 BU48 BU44 BU37 BU32 BU25 BU21 BU18 BU14 BU11 BU7 BP42 BN64 BN6 BM70 BM51 BM44 BM32 BM24 BM17 BL57 BL55 BL48 BL40 BL28 BL20 BK63 BK60 BK53 BK34 BK10 BJ64 BJ21 BJ9 BJ1 BH70 BH57 BH55 BH47 BH24 BH20 BH15 BG51 BG36 BF62 BF30 BF13 BF8 BE70 BE65 BE9 BE1 BD57 BD53 BD50 BD46 BD42 BD39 BD14 BB71 BB62 BB57 BB53 BB50 BB46 BB42 BB39 BB7 BB1 BA70 AY71 AY66 AY62 AY59 AY55 AY51 AY48 AR42 AR39 AR35 AR33 AR32 AR30 AR28 AR26 AR24 AR23 AR21 AR19 AR17 AR15 AR14 AR4 AR1 AP70 AP64 AN62 AN55 AY44 AY41 AY37 AY35 AY33 AY32 AY30 AY28 AY26
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AY24 AY23 AY21 AY19 AY17 AY15 AY14 AY12 AY8 AY4 AW67 AW62 AW59 AW55 AW51 AW48 AW44 AW41 AW37 AV9 AV1 AU70 AU62 AU57 AU53 AU50 AU46 AU42 AU39 AU35 AU33 AU32 AU30 AU28 AU26 AU24 AU23 AU21 AU19 AU17 AU15 AU14 AU4 AT64 AT10 AR62 AR57 AR53 AR50 AR46 AN51 AN48 AN44 AN41 AN37 AN5 AN4 AM64 AM8 AL62 AL55 AL51 AL48 AL44 AL41 AL37 AL35 AL33 AL1 AK70 AK64 AK55 AK51 AK48 AK44 AK41 AK37 AK32 AK30 AK28 AK26 AK24 AK23 AK21 AK19 AK17 AK15 AJ70 AH62 AH57 AH55 BV66 BV64 BT68 BR69 BR68 BR3 BN71 BN1 BL71 BL1 R14 H71 F71 E69 E68 A66 A64 E5 C68
CPU1J
10 OF 10
AH53 AH51 AH50 AH48 AH46 AH44 AH42 AH41 AH39 AH37 AH35 AH33 AH32 AH30 AH28 AH26 AH24 AH23 AH21 AH19 AH17 AH15 AH4 AG64 AG9 AG6 AF69 AF62 AF1 AE70 AE64 AD62 AD57 AD53 AD50 AD46 AD42 AD4 AC67 AC64 AC10 AC5 AC1 AB70 AB62 AB57 AB53 AB50 AB46 AB42 AB39 AB37 AB35 AB33 AB32 AB30 AB28 AB26 AB24 AB23 AB21 AB19 AB17 AB15 AB14 AB9 AA66 AA64 AA62 AA57 AA53 AA50 AA46 AA42 AA39 AA37 AA35 AA33 AA32 AA30 AA28 AA26 AA24 AA23 AA21 AA19 F20 F4 E37 E33 E30 E16 E12 D41 D38 D34 D31 D27 D24 D20 D17 D13 D10 D6 B65 B40
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
A40 A36 A33 A29 A26 A22 A19 A15 A12 A8 B62 B58 B55 B51 B48 B44 A59 A55 A52 A48 A45 AA17 AA15 AA14 AA4 W69 W62 W57 W53 W50 W46 W42 W6 W1 V70 U64 U62 U57 U53 U50 U46 U42 U39 U9 U4 T1 R70 R62 R57 R53 R50 R46 R42 R5 P4 N63 N57 N53 N50 N46 N30 N21 N15 M53 M42 M36 M1 L70 L57 L48 L47 L13 K64 K53 K43 K36 K34 K32 K25 K17 K11 K6 K4 J65 J57 J48 J47 J40 J9 H53 H43 H36 H1 G70 G57 G53 G48 G47 G43 G30 G24 G20 G15 F61 F48 F47 F28
D
C
B
Squirtle CP DIS SAMSUNG
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
2
CPU SFF 8 of 8(VSS)
Document Number Saturday, April 24, 2010
AUBURNDALE-1-GP-U3-NF
4 3
CADIZ-CP
Sheet
1
Rev
AUBURNDALE-1-GP-U3-NF 11 of 57
5
-1M
5
4
3
2
1
RTC_X1 R2267 RTC_X2
RTC_AUX_S5 R2266 330KR2J-L1-GP INTVRMEN 1 2
integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN LAN100_SLP
High=Enable High=Enable
Low=Disable Low=Disable
1 2 10MR2J-L-GP 1
integrated VccLan1_05VccCL1_05
1
R2732 0R0402-PAD
2
R2268 1MR2J-1-GP
SM_INTRUDER#
D
PVT 20100331
PCH1A RTC_AUX_S5 RTC_X1 RTC_X2 RN95 ICH_RTCRST# SRTCRST# SRN20KJ-GP-U 1 OF 10
2
D
RTC_X2_1
DVT 20100209
D33 B33 C32 A32 C34 A34 F34 AB9
INT_SERIRQ 31 LPC_LAD0_1 LPC_LAD1_1 LPC_LAD2_1 LPC_LAD3_1 R2733 R2734 R2735 R2736
B13 D13 C14 D17 A16 A14
4
1 2 1 3 4
RTCX1 RTCX2 RTCRST#
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 FWH4/LFRAME#
1 1 1 1 1
2 2 2 2
56R2F-1-GP 56R2F-1-GP 56R2F-1-GP 56R2F-1-GP
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
31,32 31,32 31,32 31,32
LPC_LFRAME#_1 R2737
2 56R2F-1-GP
3
2 1
C1010 SC1U10V2KX-1GP SC1U10V2KX-1GP
LPC_LFRAME# 31,32
SRTCRST#
RTC
LPC
SM_INTRUDER# INTVRMEN
INTRUDER# INTVRMEN
LDRQ0# LDRQ1#/GPIO23 SERIRQ
2
2
1
SC5P50V2CN-2GP 1
GAP-OPEN
82.30001.661
1
2
2
C1008
X9 X-32D768KHZ-34GPU
C1009 SC5P50V2CN-2GP
DVT 20100210
C1011 SC1U10V2KX-1GP SC1U10V2KX-1GP
2
G161
1
ACZ_BIT_CLK_1 ACZ_SYNC_1 ACZ_SPKR ACZ_RST#_1
A30 D29 P1 C30 G30 F30 E32 F32
HDA_BCLK HDA_SYNC SPKR HDA_RST# HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SDO HDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO13 SATA1RXN SATA1RXP SATA1TXN SATA1TXP SATA0RXN SATA0RXP SATA0TXN SATA0TXP
C
28,29 28 28 28
ACZ_RST# ACZ_BITCLK ACZ_SYNC ACZ_SDATAOUT
1 2 3 4
RN96 SRN33J-7-GP 8 7 6 5
28 ACZ_RST#_1 ACZ_BIT_CLK_1 ACZ_SYNC_1 ACZ_SDATAOUT_1
AK7 AK6 AK11 AK9 AH6 AH5 AH9 AH8 AF11 AF9 AF7 AF6 AH3 AH1 AF3 AF1 AD9 AD8 AD6 AD5 AD3 AD1 AB3 AB1 AF16 AF15
SATAICOMP
SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0
24 24 24 24
HDD
C
28 ACZ_SDATAIN0
ACZ_BIT_CLK_1
PCH_SPI_CLK EC87 SC22P50V2JN-4GP SC22P50V2JN-4GP
IHDA
SATA2RXN SATA2RXP SATA2TXN SATA2TXP SATA3RXN SATA3RXP SATA3TXN SATA3TXP
EC86 SC22P50V2JN-4GP SC22P50V2JN-4GP
DY
2
DY
2
EVT 20091210
When unused all JTAG pins may be NC
TPAD14-GP TP153
1
1
ACZ_SDATAOUT_1
B29 H32 J30
SATA
31 ME_UNLOCK# R2793 1
2 100KR2J-1-GP
PCH_JTAG_TCK PCH_JTAG_TMS
1
PCH_JTAG_TCK
SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXP
1
M3 K3 K1 J2 J4
JTAG_TCK JTAG_TMS JTAG_TDI
R2738 51R2F-2-GP
PCH_JTAG_TDO
JTAG
EVT 20091210
RN97
DY DY
1D05V_S0
1 R2789
2 0R2J-2-GP
2
PCH_JTAG_TDI
JTAG_TDO TRST#
SATAICOMPO SATAICOMPI
1
2
1 R2790
2 0R2J-2-GP
PCH_JTAG_TRST#
R2269 37D4R2F-GP
B
B
32
PCH_SPI_CS#0
32 PCH_SPI_MOSI 32 PCH_SPI_CLK
1 2 3 4
SRN0J-7-GP
8 7 6 5
SPI_CS#0_R SPI_MOSI_R SPI_CLK_R
SPI_CLK_R SPI_CS#0_R
BA2 AV3 AY3
SPI_CLK SPI_CS0# SPI_CS1# SPI_MOSI SPI_MISO
IBEXPEAK-M-GP-NF RN98 SATA_DET#0_R INT_SERIRQ
SATALED# SATA0GP/GPIO21 SATA1GP/GPIO19
T3 Y9 V1
SATA_DET#0_R
HDD_LED# 17,26
1D8V_S0
1D5V_S0
SPI_MOSI_R 32 SPI_MISO_R
AY1 AV1
SPI
SATA_DET#1_R 13 3D3V_S0
1
1
R2270 10KR2J-3-GP
R2271 10KR2J-3-GP
SPI_CS0#, SPI_MISO, SPI_MOSI, SPI_CLK: No series resistor required if routing length is 1.5"-6.5"
DY
2
DY
2
3 4
2 1
SRN10KJ-5-GP ACZ_SYNC_1
R2272 10KR2J-3-GP
3D3V_AUX_S5 RTC_AUX_S5 D1
RTC CONN
RTC_AUX_S5 R351 RTC_BAT R116 RTC1
DY
2
A
1
1 3
C1016 SC1U10V2KX-1GP
2
BAS16-1-GP 83.00016.B11 2ND = 83.00016.K11
1
2
510R2J-1-GP
1
2RTC_BAT_R
510R2J-1-GP
3 1 2 4
ACES-CON2-11-GP
Squirtle CP DIS SAMSUNG
A
1
If reserve 1.5/1.8V option for VCCVRM.Not Power plan change only. Please refer figure2.HDA_SYNC will be strap to define VCCVRM is 1.5 or 1.8V source. Means need have Pull high/low resistor to option, P/H voltage base on HAD Link is 1.5V or 3.3V(Figure 3).
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
2
20.F0772.002
PCH 1 of 9(SATA/RTC/HDA)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
12 of 57
5
4
3
2
5
4
3
2
1
3D3V_S5
8 7 6 5 B9 H14 C8 J14 C6 G8 M14 E10 G12 T13 T11 T9
R2628 PEG_A_CLKRQ# 1 SMB_CLK EC_SW I# 14,31 RN99 SRN2K2J-4-GP 3D3V_S5 3D3V_S0
PCH1B 27 27 27 27 26 26 26 26 27 27 27 27 26 26 26 26 PCIE_RXN1 PCIE_RXP1 PCIE_TXN1 PCIE_TXP1 PCIE_RXN2 PCIE_RXP2 PCIE_TXN2 PCIE_TXP2 PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3 PCIE_RXN4 PCIE_RXP4 PCIE_TXN4 PCIE_TXP4
2 OF 10
MINICARD1-WLAN CARDREADER
D
C222 SCD1U10V2KX-5GP 2 C223 SCD1U10V2KX-5GP 2
1 1
BG30 BJ30 TXN1 BF29 TXP1 BH29 AW30 BA30 TXN2 BC30 TXP2 BD30 AU30 AT30 TXN3 AU32 TXP3 AV32 BA32 BB32 TXN4 BD32 TXP4 BE32 BF33 BH33 BG32 BJ32 BA34 AW34 BC34 BD34 AT34 AU34 AU36 AV36 BG34 BJ34 BG36 BJ36 AK48 AK47
PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2
SMBALERT#/GPIO11 SMBCLK SMBDATA SML0ALERT#/GPIO60 SML0CLK
1 2 3 4
KBC_SCL1 SML0_DATA PCH_GPIO60 17 SML0_CLK SML0_DATA
KBC_SDA1 SML0_CLK
8 7 6 5
RN100 SRN2K2J-4-GP 3D3V_S0 SMB_DATA SMB_CLK
D
SMB_DATA
C224 SCD1U10V2KX-5GP 2 C227 SCD1U10V2KX-5GP 2
1 1
SMBus
LAN ExpressCard
C225 SCD1U10V2KX-5GP 2 C226 SCD1U10V2KX-5GP 2
1 1
PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5 PERN6 PERP6 PETN6 PETP6 PERN7 PERP7 PETN7 PETP7 PERN8 PERP8 PETN8 PETP8 CLKOUT_PCIE0N CLKOUT_PCIE0P PCIECLKRQ0#/GPIO73 CLKOUT_PCIE1N CLKOUT_PCIE1P PCIECLKRQ1#/GPIO18 CLKOUT_PCIE2N CLKOUT_PCIE2P PCIECLKRQ2#/GPIO20 CLKOUT_PCIE3N CLKOUT_PCIE3P PCIECLKRQ3#/GPIO25 CLKOUT_PCIE4N CLKOUT_PCIE4P PCIECLKRQ4#/GPIO26 CLKOUT_PCIE5N CLKOUT_PCIE5P PCIECLKRQ5#/GPIO44 CLKOUT_PEG_B_N CLKOUT_PEG_B_P PEG_B_CLKRQ#/GPIO56
IBEXPEAK-M-GP-NF
SML0DATA SML1ALERT#/GPIO74 SML1CLK/GPIO58 SML1DATA/GPIO75
PCH_GPIO74 16 KBC_SCL1 31 3,21,22 PCH_SMBDATA KBC_SDA1 31 SMB_CLK
1 2 3 4
C228 SCD1U10V2KX-5GP 2 C229 SCD1U10V2KX-5GP 2
1 1
Q54 2N7002KDW -GP 1 6
SMB_DATA
Controller
Link
EVT 20091120
PCI-E*
2 3
5 4
PCH_SMBCLK 3,21,22
CL_CLK1 CL_DATA1 CL_RST1#
84.2N702.A3F 2ND = 84.DM601.03F
2
10KR2J-3-GP
PEG_A_CLKRQ#/GPIO47 CLKOUT_PEG_A_N CLKOUT_PEG_A_P
H1 AD43 AD45 AN4 AN2 AT1 AT3
PEG_A_CLKRQ# 1 R2309
DY
2 0R2J-2-GP 4 3 4 3
PEX_CLKREQ 49
CLK_PCH_PEGA_N RN124 CLK_PCH_PEGA_P CLK_EXP_N CLK_EXP_P RN101
DIS
C
PEG
CLKOUT_DMI_N CLKOUT_DMI_P CLKOUT_DP_N/CLKOUT_BCLK1_N CLKOUT_DP_P/CLKOUT_BCLK1_P
1 2 SRN0J-10-GP-U 1 2 SRN0J-10-GP-U
CLK_PCIE_PEG# 48 CLK_PCIE_PEG 48 CLK_EXP_N_R 5 CLK_EXP_P_R 5
C
From CLK BUFFER
PCIE_CLK_RQ0# RN138 SRN0J-10-GP-U CLK_PCH_SRC1_N 3 CLK_PCH_SRC1_P 4 PCIE_CLK_RQ1# 2 0R2J-2-GP RN139 SRN0J-10-GP-U CLK_PCH_SRC2_N 4 CLK_PCH_SRC2_P 3 PCIE_CLK_RQ2# RN140 SRN0J-10-GP-U CLK_PCH_SRC3_N 4 CLK_PCH_SRC3_P 3
P9 AM43 AM45 U4 AM47 AM48 N4 AH42 AH41 A8 AM51 AM53 M9 AJ50 AJ52
CLKIN_DMI_N CLKIN_DMI_P CLKIN_BCLK_N CLKIN_BCLK_P CLKIN_DOT_96N CLKIN_DOT_96P CLKIN_SATA_N/CKSSCD_N CLKIN_SATA_P/CKSSCD_P REFCLK14IN CLKIN_PCILOOPBACK XTAL25_IN XTAL25_OUT XCLK_RCOMP CLKOUTFLEX0/GPIO64
AW24 BA24 AP3 AP1 F18 E18 AH13 AH12 P41 J42 AH51 AH53 AF38 T45 P43 T42 N50
CLK_DMI# 3 CLK_DMI 3 CLK_CPU_BCLK# 3 CLK_CPU_BCLK 3 DREFCLK# 3 DREFCLK 3 CLK_SATA# 3 CLK_SATA 3 CLK_ICH14 3 CLK_PCI_FB 16
EVT 20091207
EVT 20091201
MINICARD1-WLAN
27 W LAN_CLKREQ# 17 PCIE_CLK_RQ1# 26 CLK_PCIE_CARD# 26 CLK_PCIE_CARD
27 CLK_PCIE_MINI1# 27 CLK_PCIE_MINI1
2 1
R2274 1
3D3V_S5 RN105 PCIE_CLK_RQ0# 14,31 SUS_PW R_DN_ACK 17 PCH_GPIO28 14 PM_SYSRST#_R
1 2
CARDREADER LAN
B
1 2 3 4
SRN10KJ-6-GP
8 7 6 5
3D3V_S0
27 CLK_PCIE_LAN# 27 CLK_PCIE_LAN 27 LAN_CLKREQ# R2276
1 2 1
26 CLK_PCIE_EXPRESS# 26 CLK_PCIE_EXPRESS 26 EXPRESSCARD_CLKREQ#
PCIE_CLK_RQ3# 2 0R2J-2-GP RN141 SRN0J-10-GP-U CLK_PCH_SRC4_N 1 4 CLK_PCH_SRC4_P 2 3
3D3V_S5 RN107 PCIE_CLK_RQ3# 14 PCH_GPIO72 PCIE_CLK_RQ5#
XTAL25_IN XTAL25_OUT XCLK_RCOMP
ExpressCard
R2289
8 7 6 5
1 2 3 4
SRN10KJ-6-GP
B
1
2
PCIE_CLK_RQ4# 0R2J-2-GP
1
2
R2277 90D9R2F-1-GP
1D05V_S0
14 PCIE_CLK_RQ4#
33MHZ 33MHZ 33MHZ
Clock Flex
PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3VALW. PCIECLKRQ{1,2} should have a 10K pull-up to +1.05VS (But CRB is pull-up to +3VS).
PCIE_CLK_RQ5#
H6 AK53 AK51
CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67
XTAL25_IN 1 R2310
DIS
2
0R2J-2-GP
48MHZ
XTAL25_IN
UMA
2 2 1 1
C1023 SC12P50V2JN-3GP
14 PEG_B_CLKRQ#
P13
R2278 1MR2J-1-GP XTAL25_OUT
UMA
R2813
X10
UMA
1 1
2XTAL25_OUT_1
UMA
2 1
RN108 3D3V_S0
0R0402-PAD
1 2 3 4
SRN10KJ-6-GP
8 7 6 5
PCIE_CLK_RQ2# PCH_GPIO39 17 SATA_DET#1_R 12 PCH_GPIO38 17
PVT 20100331
Squirtle CP DIS SAMSUNG
C1024 SC12P50V2JN-3GP XTAL-25MHZ-102-GP
82.30020.851 2ND = 82.30020.791
2
PVT 20100401
A
A
CLK_PCIE_LAN
CLK_PCIE_LAN# EC90
EC89 SC22P50V2JN-4GP
5
Wistron Corporation
DVT 20100210
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
4 3 2
1
DY
2
DY
2
1
SC22P50V2JN-4GP
PCH 2 of 9(PCIE/CLK/SMB)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
13 of 57
5
4
3
2
1
3D3V_S5 RN109 3D3V_S5
8 7 6 5
1 2 3 4
SRN10KJ-6-GP
PCH_GPIO12 17 EC_SW I# 13,31 LAN_RST#1
PCH1C
3 OF 10
1 R2629
PCIE_W AKE# 2 1KR2J-1-GP
4 4 4 4 4 4 4 4
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
BC24 BJ22 AW20 BJ20 BD24 BG22 BA20 BG20 BE22 BF21 BD20 BE18 BD22 BH21 BC20 BD18 BH25
DMI0RXN DMI1RXN DMI2RXN DMI3RXN DMI0RXP DMI1RXP DMI2RXP DMI3RXP DMI0TXN DMI1TXN DMI2TXN DMI3TXN DMI0TXP DMI1TXP DMI2TXP DMI3TXP DMI_ZCOMP DMI_IRCOMP
D
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12 BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12 BJ14 BF13 BH13 BJ12 BG14
FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 FDI_INT
4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4
D
Delete PM_PWRBTN# pull high
3D3V_S5 3D3V_S0 RN110
4 4 4 4 4 4 4 4 1D05V_S0
DMI
PEG_B_CLKRQ# 13 STP_PCI# 17
FDI
8 7 6 5
1 2 3 4
SRN10KJ-6-GP
AC_PRESENT
PCIE_CLK_RQ4#
13
FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
1
2
DMI_IRCOMP_R
BF25
5V_AUX_S5 C1416
PVT 20100318
DCBATOUT
R2280 49D9R2F-GP D112 33,36 IMVP_VR_EN
K
A
1
SCD1U10V2KX-5GP
2
1SS400GP-GP
EVT 20091217
R2281 13 PM_SYSRST#_R
1
T6 M6
D111
C
R2810 820KR2F-GP U139
SYS_RESET# SYS_PWROK PWROK MEPWROK LAN_RST# DRAMPWROK RSMRST#
WAKE# CLKRUN#/GPIO32
J12 Y1
PCIE_W AKE# 26,27
C
CORE_PW RGD PM_RSMRST#
1 3 2 4 5 VCC
25,36 CORE_PW RGD
1
0R2J-2-GP
2
PM_CLKRUN# 17,31
PM_PW ROK_1 LTH
B17
ME_PW ROK LAN_RST#1
83.00222.A1RCHN222PT-GP 2ND = 83.00222.CAR
1
R2282 R2811 15KR2F-GP 17 PM_PW ROK_1
System Power Management
HTH GND RESET#/RESET LTH
1 2 3
HTH
2
1
0R2J-2-GP
2
K5 A10 D9 C16 M1 P5 P7 A6 F14
G680LT1UF-GP
SUS_STAT#/GPIO61 SUSCLK/GPIO62 SLP_S5#/GPIO63 SLP_S4# SLP_S3# SLP_M# TP23 PMSYNCH SLP_LAN#/GPIO29
P8 F3 E4 H7 P12 K8 N2 BJ10 F6
PM_SUS_STAT#
1
TP180 TPAD14-GP
D113 RB751V-40-2-GP 31,39 VTT_PW RGD
2
74.00680.A7F
PM_SUS_CLK 31 PM_SLP_S5#
5 PM_DRAM_PW RGD
1
TP181 TPAD14-GP
A
K
1
R2812 165KR2F-GP
PM_RSMRST#
PM_SLP_S4# 31,33,38,42 PM_SLP_S3# 24,26,31,33,39,40,41,42,47 PM_SLP_M# PM_SLP_DSW #
83.R2004.B8F
2
2ND = 83.R0304.A8F
Vl = 1.245 ( (R1+R2+R3)/(R2+R3)) Vh= 1.245 ( (R1+R2+R3)/(R3))
13,31 SUS_PW R_DN_ACK 31 PM_PW RBTN# 31 AC_PRESENT 13 17 PCH_GPIO72 PM_RI#
SUS_PWR_DN_ACK/GPIO30 PWRBTN# ACPRESENT/GPIO31 BATLOW#/GPIO72 RI#
IBEXPEAK-M-GP-NF
DVT 20100208
3D3V_S5
B
1
TP196 TPAD14-GP
1
TP182 TPAD14-GP
H_PM_SYNC PM_SLP_LAN#
5
B
1
1
TP183 TPAD14-GP
2
R2285 1KR2F-3-GP 1 D84
R2284
DY 10KR2J-3-GP
2
1 1
31 RSMRST#_KBC
PM_RSMRST# R2286 100KR2J-1-GP
3
DY
2
83.00054.T81 2ND = 83.BAT54.D81
3D3V_AUX_S5
2
BAT54PT-GP
Add RTC Data lose function DY D2
3D3V_S5
EVT 20091204
1
R2769 10KR2J-3-GP
S3
PM_SLP_S3_CTL 8,21,33,42
1
R2287 10KR2J-3-GP Q55
A
R2288 100KR2J-1-GP
Q91 2N7002E-1-GP
D
2
1
.
S3
2
G
5 6
2 1
8223_PGOOD 37
PM_SLP_S3#
S
4
3
PM_RSMRST#
2ND = 84.2N702.E31
. 84.2N702.D31 . . .
Squirtle CP DIS SAMSUNG
A
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
2N7002KDW -GP
84.2N702.A3F 2ND = 84.DM601.03F
All_PWRGD modify 51123_PGOOD from 3V/5V power
PCH 3 of 9(DMI/FDI)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
14 of 57
5
4
3
2
5
4
3
2
1
Panel backlight enable control for LVDS used to gate power into the backlight circuit
PCH1D
D
4 OF 10
3D3V_S0 RN147
23 PCH_BL_ON 23 PCH_LCDVDD_ON 23 L_BKLTCTL CLK_DDC_EDID DAT_DDC_EDID LCTL_CLK LCTL_DATA CLK_DDC_EDID DAT_DDC_EDID R2290 2 2K37R2F-GP
T48 T47 Y48 AB48 Y45 AB46 V48
LIBG
L_BKLTEN L_VDD_EN L_BKLTCTL L_DDC_CLK L_DDC_DATA L_CTRL_CLK L_CTRL_DATA LVD_IBG LVD_VBG LVD_VREFH LVD_VREFL LVDSA_CLK# LVDSA_CLK
SDVO_TVCLKINN SDVO_TVCLKINP SDVO_STALLN SDVO_STALLP SDVO_INTN SDVO_INTP
BJ46 BG46 BJ48 BG48 BF45 BH45
D
1 2
4 3
SRN10KJ-5-GP RN112
LCTL_CLK LCTL_DATA
1 2
4 3
SRN2K2J-1-GP
1
AP39 AP41 AT43 AT42 AV53 AV51 BB47 BA52 AY48 AV47 BB48 BA50 AY49 AV48 AP48 AP47 AY53 AT49 AU52 AT53 AY51 AT48 AU50 AT51
SDVO_CTRLCLK SDVO_CTRLDATA DDPB_AUXN DDPB_AUXP DDPB_HPD DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P DDPC_CTRLCLK DDPC_CTRLDATA DDPC_AUXN DDPC_AUXP DDPC_HPD DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P DDPD_CTRLCLK DDPD_CTRLDATA DDPD_AUXN DDPD_AUXP DDPD_HPD DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
T51 T53 BG44 BJ44 AU38 BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38 Y49 AB49 BE44 BD44 AV40 BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36
PCH_HDMI_CLK 25 PCH_HDMI_DATA 25
23 LVDS_TXACLK23 LVDS_TXACLK+ 23 LVDS_TXAOUT023 LVDS_TXAOUT123 LVDS_TXAOUT223 LVDS_TXAOUT0+ 23 LVDS_TXAOUT1+ 23 LVDS_TXAOUT2+
LVDS
PCH_HDMI_DETECT
25 PCH_HDMI_DATA2-_L 25 PCH_HDMI_DATA2+_L 25 PCH_HDMI_DATA1-_L 25 PCH_HDMI_DATA1+_L 25 PCH_HDMI_DATA0-_L 25 PCH_HDMI_DATA0+_L 25 PCH_HDMI_CLK-_L 25 PCH_HDMI_CLK+_L 25
C
Digital Display Interface
LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 LVDSB_CLK# LVDSB_CLK LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3
C
EVT 20091117
B
B
R2618 1 R2619 1 R2620 1
150R2F-1-GP 2 150R2F-1-GP 2 150R2F-1-GP 2
CRT_BLUE CRT_GREEN CRT_RED
25 CRT_BLUE 25 CRT_GREEN 25 CRT_RED
AA52 AB53 AD53 V51 V53 Y53 Y51 AD48 AB51
CRT_BLUE CRT_GREEN CRT_RED CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_VSYNC DAC_IREF CRT_IRTN
U50 U52 BC46 BD46 AT38 BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36
Squirtle CP DIS SAMSUNG
25 CRT_DDCCLK 25 CRT_DDCDATA
EVT 20091117
25 CRT_HSYNC 25 CRT_VSYNC
1 2 R2291 1KR2D-1-GP
CRT_IREF
1K 0.5% ohm
A
IBEXPEAK-M-GP-NF
CRT
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom Date:
5 4 3 2
A
PCH 4 of 9(LVDS/CRT/DP)
Document Number
CADIZ-CP
Sheet
1
Rev
-1M
15 of 57
Saturday, April 24, 2010
5
4
3
2
1
3D3V_S0 RN114 SRN8K2J-4-GP 8 7 6 5 RN144 SRN8K2J-4-GP 8 7 6 5 RN115 SRN8K2J-4-GP 8 7 6 5 RN145 SRN8K2J-4-GP 8 7 6 5
1 2 3 4
INT_PIRQH# PCI_REQ1# PCI_FRAME# dGPU_SELECT#
PCH1E
5 OF 10
D
1 2 3 4
PCI_IRDY# PCI_STOP# INT_PIRQD# PCI_SERR#
These pins are left as NC, because the function is disable.
1 2 3 4
PCI_DEVSEL# PCI_TRDY# PCI_PERR# PCI_PLOCK#
NVRAM
1 2 3 4
PCI_REQ3# INT_PIRQF# INT_PIRQB# PCI_REQ0#
1 2 3 4
C
RN116 SRN8K2J-4-GP 8 INT_PIRQE# 7 INT_PIRQA# 6 INT_PIRQC# 5 INT_PIRQG# INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD# PCI_REQ0# PCI_REQ1# dGPU_SELECT# PCI_REQ3#
PCI
H40 N34 C44 A38 C36 J34 A40 D45 E36 H48 E40 C40 M48 M45 F53 M40 M43 J36 K48 F40 C42 K46 M51 J52 K51 L34 F42 J40 G46 F44 M47 H36 J50 G42 H47 G34 G38 H51 B37 A44 F51 A46 B45 M53 F48 K45 F36 H53 B41 K53 A36 A48 K6
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# PIRQA# PIRQB# PIRQC# PIRQD# REQ0# REQ1#/GPIO50 REQ2#/GPIO52 REQ3#/GPIO54 GNT0# GNT1#/GPIO51 GNT2#/GPIO53 GNT3#/GPIO55 PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5 PCIRST# SERR# PERR# IRDY# PAR DEVSEL# FRAME# PLOCK#
NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3 NV_DQS0 NV_DQS1 NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8 NV_DQ9/NV_IO9 NV_DQ10/NV_IO10 NV_DQ11/NV_IO11 NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15 NV_ALE NV_CLE NV_RCOMP NV_RB# NV_WR#0_RE# NV_WR#1_RE# NV_WE#_CK0 NV_WE#_CK1 USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P USBRBIAS#
AY9 BD1 AP15 BD8 AV9 BG8 AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6 BD3 AY6 AU2 AV7 AY8 AY5 AV11 BF5 H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24 B25 D25 N16 J16 F16 L16 E14 G16 F12 T15
USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7
D
These pins are left as NC, because the function is disable.
USB Table
Pair 0
USBPN0 USBPP0 USBPN1 USBPP1 USBPN3 USBPP3 USBPN4 USBPP4 27 27 27 27 26 26 25 25
Device External #0 External #1 NC EXPRESS CARD External #2 NC NC NC WIMAX(HS) CAMERA(HS) WWAN(HS) FELICA(FS) BLUETOOTH(FS) MULTIMEDIA SIM(FS)
C
1 2 3 4 5 6 7 8
PCI_GNT0# PCI_GNT1#
1 1
DY DY
2 2
R2292 1KR2J-1-GP R2293 1KR2J-1-GP
USE SPI
PCI_GNT0# PCI_GNT1#
BOOT BIOS Strap PCI_GNT#0 PCI_GNT#1 BOOT BIOS Location
INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#
0 1 0 1
B
0 0 1 1
LPC(Default) Reserved PCI SPI
PCI_IRDY# PCI_DEVSEL# PCI_FRAME# PCI_PLOCK# PCI_STOP# PCI_TRDY# PCI_SERR# PCI_PERR#
E44 E50 A42 H44 F46 C46 D49 D41 C48 M7
USBPN8 27 USBPP8 27 USBPN9 23 USBPP9 23 USBPN10 27 USBPP10 27 USBPN11 32 USBPP11 32 USBPN12 26 USBPP12 26 USBPN13 27 USBPP13 27 USB_RBIAS_PN
USB
9 10 11 12 13
B
STOP# TRDY# PME# PLTRST# CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4
IBEXPEAK-M-GP-NF
USBRBIAS OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14
1 2 R2294 22D6R2F-L1-GP
EVT 20091120
5,26,27,31,32,33,48
PLT_RST#
R2295 100KR2J-1-GP
DY
2
32 13
PCLK_FW H CLK_PCI_FB R2297 1
RN117 SRN22-3-GP 2 1
D5 3 4
CLK_PCI_SIO_R CLK_PCI_FB_R CLK_PCI_KBC_R
31 CLK_PCI_KBC
2 47R2J-2-GP
N52 P53 P46 P51 P48
USB_OC#0 27 USB_OC#1 27 USB_OC#2 25
1
USB_OC#6 17
3D3V_S5 RN35 USB_OC#4 USB_OC#1 USB_OC#2 USB_OC#5 3D3V_S5
8 7 6 5
1 2 3 4
SRN10KJ-6-GP
A
A
PCLK_FW H
RN152 USB_OC#3 13 PCH_GPIO74 USB_OC#0 USB_OC#7
Squirtle CP DIS SAMSUNG
EC92
DY
2
DVT 20100210
8 7 6 5
1 2 3 4
SRN10KJ-6-GP
1
Wistron Corporation
EVT 20091214
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
SC22P50V2JN-4GP
PCH 5 of 9(PCI/USB)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
16 of 57
5
4
3
2
5
4
3
2
1
GPIO8 has a weak[20K] internal pull up. No need to have external pull down/up. GPIO8 pin set to high at reset.
PCH_GPIO0
PCH1F
6 OF 10
Y3 C38 D37 J32 F10
D
MISC
GPIO15 has a weak[20K] internal pull down. No need to have external pull up/down. GPIO 15 pin is set to low at reset. Low : ME Crypto TLS with no confidentiality High : ME Crypto TLS with confidentiality
BMBUSY#/GPIO0 TACH1/GPIO1 TACH2/GPIO6 TACH3/GPIO7 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 GPIO15 SATA4GP/GPIO16 TACH0/GPIO17
EC_SMI# PX_HDMI# 31 EC_SCI#
CLKOUT_PCIE6N CLKOUT_PCIE6P
AH45 AH46
CLKOUT_PCIE7N CLKOUT_PCIE7P
AF48 AF47
D
GPIO27 has a weak[20K] internal pull up. To enable on-die PLL Voltage regurator, should not place external pull down.
14 PCH_GPIO12 PCH_GPIO15 PCH_GPIO16
K9 T7 AA2 F38 Y7 H10 AB12 V13 M11 V6 AB7 AB13 V3 P3 H3 F1 AB6 AA4
A20GATE
U2
KA20GATE 31 RN118
CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLKOUT_BCLK0_P/CLKOUT_PCIE8P
AM3 AM1 BG10 T1 BE10 BD10
BCLK_CPU_N_R BCLK_CPU_P_R
2 1
3 4
SRN0J-10-GP-U
3D3V_S5 RN119
1 5 6 7 8
PM_RI# 14 PCH_GPIO60 13 USB_OC#6 16 PM_PW ROK_1 14 TPAD14-GP TPAD14-GP TP154
PCH_GPIO24 PCH_GPIO27 PCH_GPIO28 STP_PCI# PCH_GPIO35 PCH_GPIO36 PCH_GPIO37
GPIO
EVT 20091216
1
TP155 13 PCH_GPIO28 14 STP_PCI#
PCH_GPIO17 PCH_GPIO22
BCLK_CPU_N 5 BCLK_CPU_P 5
SCLOCK/GPIO22 GPIO24 GPIO27 GPIO28 STP_PCI#/GPIO34
PECI RCIN#
H_PECI 5 KBRCIN# 31 RN120 SRN56J-4-GP 4 3
CPU
4 3 2 1
SRN33KJ-1-GP 3D3V_S5
PROCPWRGD THRMTRIP#
H_PW RGD 5
To CPU
PCH_THERMTRIP_R
1 2
1D05V_S0
DY
1 2 R2298 54D9R2F-L1-GP
PM_THRMTRIP-A# 5,33
EVT 20091204
2 8K2R2J-3-GP
PCH_GPIO45 13 PCH_GPIO38 13 PCH_GPIO39
SATACLKREQ#/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37 SLOAD/GPIO38 SDATAOUT0/GPIO39 PCIECLKRQ6#/GPIO45 PCIECLKRQ7#/GPIO46 SDATAOUT1/GPIO48 SATA5GP/GPIO49 GPIO57 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_28 VSS_NCTF#A4 VSS_NCTF#A49 VSS_NCTF#A5 VSS_NCTF#A50 VSS_NCTF#A52 VSS_NCTF#A53 VSS_NCTF#B2 VSS_NCTF#B53 VSS_NCTF#BE1 VSS_NCTF#BE53 VSS_NCTF#BF1 VSS_NCTF#BF53 VSS_NCTF#BH1 VSS_NCTF#BH53 VSS_NCTF#BJ1 VSS_NCTF#BJ2 VSS_NCTF#BJ4 VSS_NCTF#BJ49 VSS_NCTF#BJ5 VSS_NCTF#BJ50 VSS_NCTF#BJ52 VSS_NCTF#BJ53 VSS_NCTF#D1 VSS_NCTF#D53 VSS_NCTF#E1 VSS_NCTF#E53 TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 BA22 AW22 BB22
1 R2770
C
DVT 20100223
C
PCH_GPIO38 PCH_GPIO39 PCH_GPIO45
AY45 AY46
1D5V_S3
PCH_GPIO48
AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 1
3D3V_S5 R2773 0R2J-2-GP
1
R2299 2 1 PCH_GPIO15 1KR2J-1-GP 3D3V_S0 RN122
EVT 20091204
RST_GATE
AV43
R2771 1KR2F-3-GP
S3
2
F8 5 6 7 8
PCH_GPIO36 PCH_GPIO48 PCH_GPIO16 PCH_GPIO0
4 3 2 1
SRN10KJ-6-GP RN143
DDR3_DRAMRST#
21,22
NCTF
RSVD
NCTF TEST PIN: A4,A49,A5,A50,A52,A53,B2,B53,BE1, BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4, BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
4 3
1 2
SRN10KJ-5-GP
PCH_GPIO17 PCH_GPIO37
TP184 TPAD14-GP
B
1 TP185 TPAD14-GP
RN123 3D3V_S0
4 3 2 1
SRN10KJ-6-GP
5 6 7 8
PCH_GPIO35
PCIE_CLK_RQ1# 13 HDD_LED# 12,26 PM_CLKRUN# 14,31 TP186 TPAD14-GP
3D3V_S0
8 7 6 5
1 2 3 4
SRN10KJ-6-GP
EC_SCI# PCH_GPIO22 PX_HDMI# EC_SMI#
NC_4 NC_5 INIT3_3V# TP24
TP187 TPAD14-GP
1
AB41 T39 P6 C10
2
RP1
A4 A49 A5 A50 A52 A53 1 B2 B53 BE1 BE53 BF1 BF53 BH1 BH53 BJ1 1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 1 BJ53 D1 D53 E1 E53
TP13 TP14 TP15 TP16 TP17 TP18 TP19 NC_1 NC_2 NC_3
1 D
B4 B52 BH2 BH52 D2
TP12
NON_S3
.
S3
S3
Q92 2N7002E-1-GP
M30 N30 H12 AA23 AB45
C1411 RST_GATE R2772 10KR2F-2-GP
. . . .
G S
84.2N702.D31 2ND = 84.2N702.E31
2
B
1
AB38 AB42
SCD1U10V2KX-5GP
2
S3
SM_DRAMRST# 5 R2774 100KR2F-L1-GP
S3
2
IBEXPEAK-M-GP-NF
EVT 20100109
EVT 20091209
A
Squirtle CP DIS SAMSUNG
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:
5 4 3 2
PCH 6 of 9(GPIO/RSVD)
Document Number Saturday, April 24, 2010
CADIZ-CP
Sheet
1
Rev
-1M
17 of 57
5
4
3
2
1
1D05V_S0
D
5V_S0
Imax = 300 mA
U87
1.432A
1 1 C1034 SC10U6D3V3MX-GP C1033 SC1U6D3V2KX-GP 2 2
PCH1G AB24 AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31 AJ30 AJ31 VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE
POWER
CRT
3D3V_S0_DAC 7 OF 10 VCCADAC VCCADAC VSSA_DAC VSSA_DAC AE50 AE52 2 AF53 AF51
3D3V_S0_DAC
D
69mA
1 1 C1035 SCD1U10V2KX-5GP C1036 SCD01U16V2KX-3GP 1 C1038 SC1U10V2KX-1GP 2
1 2 3
VIN GND EN
VOUT NC#4
5 1 4 C1039 SC1U10V2KX-1GP 1 2 2 C1037 SC10U6D3V3MX-GP
G9091-330T11U-GP
VCC CORE
74.09091.J3F 2nd = 74.09198.G7F
VCCALVDS VSSA_LVDS VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS
AH38 AH39 AP43 AP45 AT46 AT45
300mA 59mA
1 C1040 SCD01U16V2KX-3GP SCD01U16V2KX-3GP 2
3D3V_S0
1
1D05V_S0 AK24 TP160 TPAD14-GP 1 BJ24 AN20 AN22 AN23 AN24 AN26 AN28 BJ26 BJ28 AT26 AT28 AU26 AU28 AV26 AV28 AW26 AW28 BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27 AN30 AN31 AN35 AT22 TP167 1D05V_S0 TPAD14-GP 1 BJ18 AM23 1 C1051 SC1U6D3V2KX-GP IBEXPEAK-M-GP-NF VCCIO VCCAPLLEXP
VCCTX_LVDS C1041 SC10U6D3V3MX-GP
L61 IND-1UH-2-GP 1
1D8V_S0 2
LVDS
C
1D05V_S0
3.062A
1 1 1 1 1 1 C1338 C1339 C1340 SC1U6D3V2KX-GP SC1U6D3V2KX-GP C1341 SC1U6D3V2KX-GP C1342 SC1U6D3V2KX-GP 1 C1343 SC1U6D3V2KX-GP SC10U6D3V3MX-GP SC10U6D3V3MX-GP TC49 ST220U2D5VBM-2GP 2 2 2 2 2
VCC3_3 VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCC3_3 VCCVRM[1] VCCFDIPLL
AB34 AB35 AD35
2
2
C
HVCMOS
VCC3_3 VCC3_3
DY
357mA
1 2
2
3D3V_S0 C1047 SCD1U10V2KX-5GP 1D8V_S0 1 1D5V_S0_1D8V_S0 1D5V_S0 R2300 0R3J-0-U-GP 1 1D05V_S0 C1048 SC1U6D3V2KX-GP R2301 0R3J-0-U-GP 2 2 1D5V_S0_1D8V_S0
2
VCCVRM
AT24 AT16 AU16
196mA 61mA
2 1
DMI
VCCDMI VCCDMI
DY
B
PCI E*
3D3V_S0
NAND / SPI
357mA
1D5V_S0_1D8V_S0
1
C1049 SCD1U10V2KX-5GP
VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND
1
AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15
B
VCCPNAND which power the DC NAND interface must be powered even if dual channel NAND interface is not connected since it also supplies power to other functions inside PCH.
1D8V_S0
156mA
C1050 SCD1U10V2KX-5GP 2
2
FDI
VCCIO
VCCME3_3 VCCME3_3 VCCME3_3 VCCME3_3
AM8 AM9 AP11 AP9
3D3V_S0
85mA
1 2 C1052 SCD1U10V2KX-5GP Squirtle CP DIS SAMSUNG
A
A
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom
PCH 7 of 9(PWR/VCORE/LVDS)
Document Number
CADIZ-CP
Sheet
1
Rev
-1M
18 of 57
Date: Saturday, April 24, 2010
5 4 3 2
5
4
3
2
1
PCH1J TP162
POWER
10 OF 10
1D05V_S0
1
AP51 AP53 AF23 AF24
VCCACLK VCCACLK VCCLAN VCCLAN DCPSUSBYP VCCME VCCME VCCME VCCME VCCME VCCME
TPAD14-GP
VCCIO VCCIO VCCIO VCCIO VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCIO V5REF_SUS
V24 V26 Y24 Y26 V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26 U23 V23 F24
1 2
C1053 SC1U6D3V2KX-GP 3D3V_S5
D
D
1
1
DCPSUSBYP
Y20 AD38
C1060 SCD1U10V2KX-5GP
C1054 SC1U6D3V2KX-GP
1 2
C1055 SC1U6D3V2KX-GP
2
SCD1U10V2KX-5GP
1
AD41
1D05V_S0
1.849A
1 1
C1058 SC1U6D3V2KX-GP SC1U6D3V2KX-GP C1059 SC1U6D3V2KX-GP
AF43 AF41 AF42 V39 V41 V42 Y39 Y41 Y42
1
USB
2
AD39
C1057 SC10U6D3V3MX-GP
3D3V_S5 3D3V_S5 C1061
2
2
2
VCCME VCCME VCCME VCCME VCCME
Clock and Miscellaneous
SC1U6D3V2KX-GP 2 1
VCCME
2
C1056
2
D82 CH751H-40PT-GP
DY
1
1D05V_S0
3D3V_S0
83.R0304.A8F
5V_S5
2 1 100R2J-2-GP
C1063 SCD1U10V2KX-5GP
1D05V_S0
C
C1062
5VALW_PCH_VCC5REFSUS
1mA
1
VCCVRM VCCADPLLA VCCADPLLA VCCADPLLB VCCADPLLB VCCIO VCCIO VCCIO VCCIO
PCI/GPIO/LPC
2
2
1D05V_VCCA_A_DPL L63 1 2 IND-10UH-215-GP C1068 68.1001D.10E 2ND = 68.10010.10T DY SC10U6D3V3MX-GP 1D05V_VCCA_B_DPL
68mA 69mA
2 1VCCIO_1 R2781 0R2J-2-GP
VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3
1
M36 2 N36 P36 U35 AD13
C1067 SCD1U10V2KX-5GP
1
1
C1069 SC1U6D3V2KX-GP
1D05V_S0
1D05V_VCCA_B_DPL
BD51 BD53 AH23 AJ35 AH35 AF34
2
2
1
1
C1070 SC1U6D3V2KX-GP
C1071 SC1U6D3V2KX-GP
3D3V_S0
2
2
2 1VCCIO_2 AH34 R2782 C1072 AF32 0R2J-2-GP 1
SC1U6D3V2KX-GP
VCCIO VCCIO DCPSST VCCSATAPLL VCCSATAPLL AK3 AK1
1
C1073 SCD1U10V2KX-5GP
2
V12
1
TP163
+VCCSST
TPAD14-GP
2
1D05V_S0
1
Y22
B
2
C1074 SCD1U10V2KX-5GP
DCPSUS VCCIO
1
3D3V_S5
AH22 AT20 AH19 AD20 AF22 AD19 AF20 AF19 AH20 AB19 AB20 AB22 AD22 AA34 Y34 Y35 AA35 L30 1
1D05V_S0
2
BB51 BB53
VCC3_3
J38 L38
3D3V_S0
1
L62 1 2 IND-10UH-215-GP 68.1001D.10E 2ND = 68.10010.10T SC10U6D3V3MX-GP
2
1D05V_VCCA_A_DPL
1
VCCRTCEXT
V9
DCPRTC
1
2 R2302
DY
D83 CH751H-40PT-GP
83.R0304.A8F
5V_S0
C
DY
C1065 SC1U6D3V2KX-GP
SCD1U10V2KX-5GP 1D5V_S0_1D8V_S0
1
1
AU24
V5REF
K49
5VS_PCH_VCC5REF
2
C1064
1mA
1 100R2J-2-GP
C1066
2 R2303
SC1U6D3V2KX-GP
2
1
C1075 SCD1U10V2KX-5GP
163mA
C1076 S