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MC1377 Color Television RGB to PAL/NTSC Encoder
The MC1377 will generate a composite video from baseband red, green, blue, and sync inputs. On board features include: a color subcarrier oscillator; voltage controlled 90° phase shifter; two double sideband suppressed carrier (DSBSC) chroma modulators; and RGB input matrices with blanking level clamps. Such features permit system design with few external components and accordingly, system performance comparable to studio equipment with external components common in receiver systems. · Self­contained or Externally Driven Reference Oscillator

COLOR TELEVISION RGB to PAL/NTSC ENCODER
SEMICONDUCTOR TECHNICAL DATA

· · ·

Chroma Axes, Nominally 90° (±5°), are Optionally Trimable PAL/NTSC Compatible Internal 8.2 V Regulator
20 1

P SUFFIX PLASTIC PACKAGE CASE 738

20 1

DW SUFFIX PLASTIC PACKAGE CASE 751D (SO­20L)

ORDERING INFORMATION
Device MC1377DW MC1377P Operating Temperature Range TA = 0° to +70°C Package SO­20L Plastic DIP

Figure 1. Representative Block Diagram
Quad Decoup 19 VCC 14 VB 16

Oscout

18 Oscillator Buffer Voltage Controlled 90° 8.2V Regulator PAL Switch 0/180° Chroma Amp 13 Chroma Out

17 Oscin

H/2 20 NTSC/PAL Select PAL/NTSC Control Burst Pulse Driver

90° R­Y

0° B­Y B­Y Clamp

10 11

Chroma In

B­Y Clamp

R­Y Gnd 15 Latching Ramp Generator Dual Comparator Color Difference and Luminance Matrix

B­Y ­Y

R­Y Clamp

12

R­Y Clamp

Output Amp/ Clamp 2 Composite Sync Input 3 R G Inputs
© Motorola, Inc. 1995

9 Composite Video Output Video Clamp 7

1 Trise

4 B

5

6 ­Yout

8 ­Yin

MOTOROLA ANALOG IC DEVICE DATA

1

MC1377
MAXIMUM OPERATING CONDITIONS
Rating Supply Voltage Storage Temperature Power Dissipation Package Derate above 25°C Operating Temperature Symbol VCC Tstg PD TA Value 15 ­65 to +150 1.25 10 0 to +70 Unit Vdc °C W mW/°C °C

RECOMMENDED OPERATING CONDITIONS
Characteristics Supply Voltage IB Current (Pin 16) Sync, Blanking Level (DC level between pulses, see Figure 9e) Sync Tip Level (see Figure 9e) Sync Pulse Width (see Figure 9e) R, G, B Input (Amplitude) R, G, B Peak Levels for DC Coupled Inputs, with Respect to Ground Chrominance Bandwidth (Non­comb Filtered Applications), (6 dB) Ext. Subscarrier Input (to Pin 17) if On­Chip Oscillator is not used. Min 10 0 1.7 ­0.5 2.5 ­ 2.2 0.5 0.5 Typ 12 ­ ­ 0 ­ 1.0 ­ 1.5 0.7 Max 14 ­10 8.2 0.9 5.2 ­ 4.4 2.0 1.0 Unit Vdc mA Vdc µs Vpp V MHz Vpp

ELECTRICAL CHARACTERISTICS (VCC = 12 Vdc, TA = 25°C, circuit of Figure 7, unless otherwise noted.)
Characteristics SUPPLY CURRENT Supply Current into VCC, No Load, on Pin 9. Circuit Figure 7 VCC = 10 V VCC = 11 V VCC = 12 V VCC = 13 V VCC = 14 V 14 ICC ­ ­ 20 ­ ­ 33 34 35 36 37 ­ ­ 40 ­ ­ mA Pins Symbol Min Typ Max Unit

VOLTAGE REGULATOR VB Voltage (IB = ­10 mA, VCC = 12 V, Figure 7) Load Regulation (0 < IB 10 mA, VCC = 12 V) Line Regulation (IB = 0 mA, 10 V < VCC < 14 V) OSCILLATOR AND MODULATION Oscillator Amplitude with 3.58 MHz/4.43 MHz crystal Subcarrier Input: Resistance at 3.58 MHz Subcarrier Input: Resistance at 4.43 MHz Capacitance Modulation Angle (R­Y) to (B­Y) Angle Adjustment (R­Y) DC Bias Voltage CHROMINANCE AND LUMINANCE Chroma Input DC Level Chroma Input Level for 100% Saturation Chroma Input: Resistance Chroma Input: Capacitance Chroma DC Output Level Chroma Output Level at 100% Saturation Chroma Output Resistance Luminance Bandwidth (­3.0 dB), Less Delay Line 9 13 10 Vin Rin Cin Vout Rout BWLuma ­ ­ ­ ­ 8.9 ­ ­ ­ 4.0 0.7 10 2.0 10 1.0 50 8.0 ­ ­ ­ ­ 10.9 ­ ­ ­ Vdc Vpp k pF Vdc Vpp MHz ­ 19 19 17 17 Osc Rosc Cosc m m V19 ­ ­ ­ ­ ­ ­ ­ 0.6 5.0 4.0 2.0 ±5 0.25 6.4 ­ ­ ­ ­ ­ ­ ­ Vpp k pF Deg Deg/µA Vdc 16 VB Regload Regline 7.7 ­20 ­ 8.2 120 4.5 8.7 +30 ­ Vdc mV mV/V

2

MOTOROLA ANALOG IC DEVICE DATA

MC1377
ELECTRICAL CHARACTERISTICS (VCC = 12 Vdc, TA = 25°C, circuit of Figure 7, unless otherwise noted.)
Characteristics VIDEO INPUT R, G, B Input DC Levels R, G, B Input for 100% Color Saturation R, G, B Input: Resistance R, G, B Input: Capacitance Sync Input Resistance (1.7 V < Input < 8.2) COMPOSITE VIDEO OUTPUT Composite Output, 100% Saturation (see Figure 8d) Output Impedance (Note 1) Subcarrier Leakage in Output (Note 2) Sync Luminance Chroma Burst 9 CVout ­ ­ ­ ­ ­ ­ 0.6 1.4 1.7 0.6 50 20 ­ ­ ­ ­ ­ ­ Vpp 2 RRGB CRGB Sync 3, 4, 5 RGB 2.8 ­ 8.0 ­ ­ 3.3 1.0 10 2.0 10 3.8 ­ 17 ­ ­ Vdc Vpp k pF k Pins Symbol Min Typ Max Unit

Rvideo Vlk

mVpp

NOTES: 1. Output Impedance can be reduced to less than 10 by using a 150 output load from Pin 9 to ground. Power supply current will increase to about 60 mA. 2. Subcarrier leakage can be reduced to less than 10 mV with optional circuitry (see Figure 12).

PIN FUNCTION DESCRIPTIONS
Symbol tr Sync R G B ­Yout Vclamp ­Yin CVout ChromaIn B­Yclamp R­Yclamp ChromaOut VCC Gnd VB Oscin Oscout m NTSC/PAL Select Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Description External components at this pin set the rise time of the internal ramp function generator (see Figure 10). Composite sync input. Presents 10 k resistance to input. Red signal input. Presents 10 k impedance to input. 1.0 Vpp required for 100% saturation. Green signal input. Presents 10 k impedance to input. 1.0 Vpp required for 100% saturation. Blue signal Input. Presents 10 k impedance to input. 1.0 Vpp required for 100% saturation. Luma (­Y) output. Allows external setting of luma delay time. Video Clamp pin. Typical connection is a 0.01 µF capacitor to ground. Luma (­Y) input. Presents 10 k input impedance. Composite Video output. 50 output impedance. Chroma input. Presents 10 k input impedance. B­Y clamp. Clamps B­Y during blanking with a 0.1 µF capacitor to ground. Also used with R­Y clamp to null residual color subcarrier in output. R­Y clamp. Clamps R­Y during blanking with a 0.1 µF capacitor to ground. Also used with B­Y clamp to null residual color subcarrier in output. Chroma output. 50 output impedance. Power supply pin for the IC; +12, ± 2.0 V, required at 35 mA (typical). Ground pin. 8.2 V reference from an internal regulator capable of delivering 10 mA to external circuitry. Oscillator input. A transistor base presents 5.0 k to an external subcarrier input, or is available for constructing a Colpitts oscillator (see Figure 4). Oscillator output. The emitter of the transistor, with base access at Pin 17, is accessible for completing the Colpitts oscillator. See Figure 4. Quad decoupler. With external circuitry, R­Y to B­Y relative angle errors can be corrected. Typically, requires a 0.01 µF capacitor to ground. NTSC/PAL switch. When grounded, the MC1377 is in the NTSC mode; if unconnected, in the PAL mode.

MOTOROLA ANALOG IC DEVICE DATA

3

MC1377
FUNCTIONAL DESCRIPTION
Figure 2. Power Supply and VB
0.1 VCC = +12V 14

Power Supply and VB (8.2 V Regulator) The MC1377 pin for power supply connection is Pin 14. From the supply voltage applied to this pin, the IC biases internal output stages and is used to power the 8.2 V internal regulator (VB at Pin 16) which biases the majority of internal circuitry. The regulator will provide a nominal 8.2 V and is capable of 10 mA before degradation of performance. An equivalent circuit of the supply and regulator is shown in Figure 2.
9

16

8.2V Regulator

100

R, G, B Inputs The RGB inputs are internally biased to 3.3 V and provide 10 k of input impedance. Figure 3 shows representative input circuitry at Pins 3, 4, and 5. The input coupling capacitors of 15 µF are used to prevent tilt during the 50/60 Hz vertical period. However, if it is desired to avoid the use of the capacitors, then inputs to Pins 3, 4, and 5 can be dc coupled provided that the signal levels are always between 2.2 V and 4.4 V. After input, the separate RGB information is introduced to the matrix circuitry which outputs the R­Y, B­Y, and ­Y signals. The ­Y information is routed out at Pin 6 to an external delay line (typically 400 ns). DSBSC Modulators and 3.58 MHz Oscillator

32mA 15

Figure 3. RGB Input Circuitry
R­Y B­Y ­Y

RGB Matrix

27k

27k

27k

18k

18k

18k

3 R

15µF

4 G

15µF

5 B

15µF

6 ­Y

Figure 4. Chroma Section
Chroma Out 13 Amp/ Buffer NTSC +90° B­Y R­Y Oscillator 17 Quad Decoup 18 19

PAL Switch 0/180°

PAL

PAL/NTSC Control Burst Flag NTSC PAL

The R­Y and B­Y outputs (see (B­Y)/(R­Y) Axes versus I/Q Axes, Figure 22) from the matrix circuitry are amplitude modulated onto the 3.58/4.43 MHz subcarrier. These signals are added and color burst is included to produce composite chroma available at Pin 13. These functions plus others, depending on whether NTSC or PAL operation is chosen, are performed in the chroma section. Figure 4 shows a block diagram of the chroma section. The MC1377 has two double balanced mixers, and regardless of which mode is chosen (NTSC or PAL), the mixers always perform the same operation. The B­Y mixer modulates the color subcarrier directly, the R­Y mixer receives a 90° phase shifted color subcarrier before being modulated by the R­Y baseband information. Additional operations are then performed on these two signals to make them NTSC or PAL compatible. In the NTSC mode, the NTSC/PAL control circuitry allows an inverted burst of 3.58 MHz to be added only to the B­Y signal. A gating pulse or "burst flag" from the timing section permits color burst to be added to the B­Y signal. This color burst is 180° from the B­Y signal and 90° away from the R­Y signal (see Figure 22) and permits decoding of the color information. These signals are then added and amplified before being output, at Pin 13, to be bandpassed and then reintroduced to the IC at Pin 10. In the PAL mode, NTSC/PAL control circuitry allows an inverted 4.43 MHz burst to be added to both R­Y and B­Y equally to produce the characteristic PAL 225°/135 burst phase. Also, the R­Y information is switched alternately from 180° to 0° of its original position and added to the B­Y information to be amplified and output.

B­Y

R­Y

4

MOTOROLA ANALOG IC DEVICE DATA

MC1377
Timing Circuitry The composite sync input at Pin 2 performs three important functions: it provides the timing (but not the amplitude) for the sync in the final output; it drives the black level clamps in the modulators and output amplifier; and it triggers the ramp generator at Pin 1, which produces burst envelope and PAL switching. A representative block diagram of the timing circuitry is shown in Figure 5. In order to produce a color burst, a burst envelope must be generated which "gates" a color subcarrier into the R­Y and B­Y modulators. This is done with the ramp generator at Pin 1. The ramp generator at Pin 1 is an R­C type in which the pin is held low until the arrival of the leading edge of sync. The rising ramp function, with time constant R­C, passes through two level sensors ­ the first one starts the gating pulse and the second stops it (see Figure 10). Since the "early" part of the exponential is used, the timing provided is relatively accurate from chip­to­chip and assembly­to­assembly. Fixed components are usually adequate. The ramp continues to rise for more than half of the line interval, thereby inhibiting burst generation on "half interval" pulses on vertical front and back porches. The ramp method will produce burst on the vertical front and back "porches" at full line intervals. R­Y, B­Y Clamps and Output Clamp/Amplifier The sync signal, shown in the block diagram of Figure 6, drives the R­Y and B­Y clamps which clamp the R­Y and B­Y signals to reference black during the blanking periods. The output amplifier/clamp provides this same function plus combines and amplifies the chroma and luma components for composite video output. Application Circuit Figure 7 illustrates the block diagram of the MC1377 and the external circuitry required for typical operation. Figure 7. Block Diagram and Application Circuit
3.58/ 4.43* MHz 17 220 18 220 H/2 20 5.0 to 25pF NTSC/ PAL Select 15 PAL/NTS C Control Burst Pulse Driver R­Y Latching Ramp Gen Osc/ Buffer VCC 0.01 19 14 VB 16 0.1 TOKO 166NNF ­10264AG PAL Switch 0/180° 13 220 100/ 62* 10 B­Y B­Y Clamp R­Y Clamp Output Amp/ Clamp ­Y 1 0.001 mica 56k VB 2 3 15µF Composite Sync Input R + 4 15µF G R, G, B Inputs + 5 15µF B + 6 1.0k 400ns Y Delay ­Y 8 1.0k 7 0.01 11 1000 0.1 12 0.1 9 Composite Video Output 47/33* 3.3k ­Y

Figure 5. Timing Circuitry
H/2 PAL/ NTSC Sync Input 20 2 VB R C 1 10k Latching Ramp Generator PAL/NTSC Control Line Drive Burst Flag Dual Comparator Burst Pulse Driver

Figure 6. R­Y, B­Y and Output Amplifier Clamps
Chroma 10 B­Y B­Y Clamp 11 0.1

R­Y R­Y Clamp

12 0.1 9 Composite Video 0.01

Sync

Output Amp/Clamp 8

7

Voltage Controlled 90°

8.2V Regulator

Chroma Amp

0.1

90° R­Y



B­Y

Dual Comparator

Color Difference and Luminance Matrix

* Refers to the choice NTSC/PAL * (3.58 MHz/4.43 MHz).

MOTOROLA ANALOG IC DEVICE DATA

5

MC1377

Osc In

17

18

Osc Out

19

Quad Decoup

14
+12V R4 2.0k T4 T5 T6 R5 470 R8 220 R9 220 R7 4.0k T14 + C2 18pF T15 R18 220 R20 220 T16 T17 R161 15k

R10 5.0k + R6A 5.1k C1 5pF T2 T3 T7 R6 5.1k T8 R15 1.5k R162 220 T9

T11

T12 T23 T24 T25 T26 T27 R27 220 R21 220 T13 T19 R23 1.5k R24 1.5k T20

T28 5.0k R30

16
+8.2V Z1 R2 1.2k T1 Gnd PAL/NTSC R2A 1.0k R3 6.8k R13 22k R11 22k R12 10k R14 22k

T10

R16 1.0k

R17 1.0k

15

T18 R22 270 R9 22k 560 R25 T22 560 R26 22k R28 10k R29

20

R80A 4.0k R77 15k R71 22k T68 T69 R76 15k R81 22k R80 B 6.0k T73 T74 R82 22k R78 15k 22k T79 T72 T78 R91 10k T79 T80 R92 2.2k R93 2.2k R94 2.2k T81 R83 10k R79 1.0k Z2 T75 R86 10k R90 22k T76 R87 13.8k R88 30.4k R95 18k T82 T77

2
Comp Sync

10k R69 R70 10k R72 22k R73 22k R74 10k R75 10k T71 R85 10k

R100 22k T91A T91B R102 1.0k T96 R106 9.1k

R105 7.5k T97 R110 1.0k R109 22k T105

R111 4.7k T107 T206

R118 10k

R96 22k

R97 22k

T95

R112 36k

R113 27k R117 10k R120 27k R121 27k T109 R127 27k T110 T111

R101 10k R98 22k T92 TRISE R­IN G­IN B­IN R99 10k T93 R160 22k T94 R104 2.0k R104 15k

R107 820 T98 T99 T100 T101

T90

T108

1 3 4 5

R108 2.7k

R164 4.7k

T102

T103

T104

R115 R116 18k 3.9k

R119 5.3k

R122 18k

R123 3.9k

R126 2.7k

R129 18k

6

MOTOROLA ANALOG IC DEVICE DATA

MC1377
Figure 8. Internal Schematic
Chroma Out

13

R31 5.1k T30 R31 5.1k

R35 1.0k

R36 1.0k

R66 2.4k

R67 220

R51 12k

T5 4 T31 T32 T33 T34 R68 3.0k

T28 T23 R27 220 R21 220 5.0k R30

R37 220

R55 220

T35

T36

T37

T38

R54 220

T50

T51

T52

T53

PAL F/F PAL F/F

22k R28

10k R29

22k R33

27k R34

T40 R39 500

R46 1.0k R47 1.0k

T42 T41 Burst Flag R48 500 R50 220 B­Y

T49

R53 500

T55

R56 1.0k R57 1.0k

T57 T56 R64 500 R65 220

T39 R­Y

R40 2.0k

R41 2.0K T44

R61 2.0k Burst Flag

R62 2.0k

T43

T60

T61

B­Y Clamp

11

T62 T64

T63 T65 R60 4.7k T47 T59 T66 T58

T45 R47 4.7k

T46

T48 R38 10k R43 10k R44 22k R45 300 R49 10k R52 10k

R43A 10k R44A 22k

R58 300

R63 10k

R58 300

R­Y Clamp

12 10

Chroma In

R132 1.85k

R124 12.5 k T114

R135 220

R136 4.7k

R157 22k

R147 27k T127

R154 100

T128 T125 R158 10k R127 27k R128 220 T1 T112 T113 R129 R130 18k 3.9k R125 12.5k R163 10k 22k R155 R159 10k T115 R133 220 R134 220 T116 R137 1.5k T120 T118 R156 220 T122 T121 R153 220

Composite Video Out

9

Video Clamp R145 3.3k T123 T124 R149 10k T126 10k R142 15k R148 15k R152 R150 4.7k R151 9.1k

7

R139 40k

T110

T117

T119

R143 22k 20k R144

R123 3.9k

R126 2.7k

R131 14k

470 R140

470 R141

4.7k R138

­Y In

8 6

­Y Out

MOTOROLA ANALOG IC DEVICE DATA

7

MC1377
APPLICATION INFORMATION
Figure 8. Signal Voltages (Circuit Values of Figure 7)
(a) 4.4V Limits for DC Coupled Inputs 100% Green Input (Pin 4)

R, G, B Input Levels The signal levels into Pins 3, 4, 5 should be 1.0 Vpp for fully saturated, standard composite video output levels as shown in Figure 9(d). The inputs require 1.0 Vpp since the internally generated sync pulse and color burst are at fixed and predetermined amplitudes. Further, it is essential that the portion of each input which occurs during the sync interval represent black for that input since that level will be clamped to reference black in the color modulators and output stage. This implies that a refinement, such as a difference between black and blanking levels, must be incorporated in the RGB input signals. If Y, R­Y, B­Y and burst flag components are available and the MC1377 is operating in NTSC, inputs may be as follows: the Y component can be coupled through a 15 pF capacitor to Pins 3, 4 and 5 tied together; the (­[R­Y]) component can be coupled to Pin 12 through a 0.1 µF capacitor, and the (­[B­Y]) and burst flag components can be coupled to Pin 11 in a similar manner. Sync Input As shown in Figure 9(e), the sync input amplitude can be varied over a wide latitude, but will require bias pull­up from most sync sources. The important requirements are: 1) The voltage level between sync pulses must be between 1.7 V and 8.2 V, see Figure 9(e). 2) The voltage level for the sync tips must be between +0.9 V and ­ 0.5 V, to prevent substrate leakage in the IC, see Figure 9(e). 3) The width of the sync pulse should be no longer than 5.2 µs and no shorter than 2.5 µs. For PAL operation, correctly serrated vertical sync is necessary to properly trigger the PAL divider. In NTSC mode, simplified "block" vertical sync can be used but the loss of proper horizontal timing may cause "top hook" or "flag waving" in some monitors. An interesting note is that composite video can be used directly as a sync signal, provided that it meets the sync input criteria. Latching Ramp (Burst Flag) Generator The recommended application is to connect a close tolerance (5%) 0.001 µF capacitor from Pin 1 to ground and a resistor of 51 k or 56 k from Pin 1 to VB (Pin 16). This will produce a burst pulse of 2.5 µs to 3.5 µs in duration, as shown in Figure 10. As the ramp on Pin 1 rises toward the charging voltage of 8.2 V, it passes first through a burst "start threshold" at 1.0 V, then a "stop threshold" at 1.3 V, and finally a ramp reset threshold at 5.0 V. If the resistor is reduced to 43 k, the ramp will rise more quickly, producing a narrower and earlier burst pulse (starting approx. 0.4 µs after sync and about 0.6 µs wide). The burst will be wider and later if the resistor is raised to 62 k, but more importantly, the 5.0 V reset point may not be reached in one full line interval, resulting in loss of alternate burst pulses. As mentioned earlier, the ramp method does produce burst at full line intervals on the "vertical porches." If this is not desired, and the MC1377 is operating in the NTSC mode, burst flag may be applied to Pin 1 provided that the tip of the pulse is between 1.0 Vdc and 1.3 Vdc. In PAL mode this method is not suitable, since the ramp isn't available to drive the PAL flip­flop. Another means of inhibiting the burst pulse is to set Pin 1 either above 1.3 Vdc or below 1.0 Vdc for the duration that burst is not desired. MOTOROLA ANALOG IC DEVICE DATA

1.0Vpp

2.2V (b) 1.0Vpp 100% Red Input (Pin 3)

(c) 1.0Vpp

100% Blue Input (Pin 5)

(d)

5.0 4.0 Composite Output (Pin 9)

3.0 8.2 Max (e) 1.7 Min 0.9 Max 0 ­0.5 Min (f) 10.5 Chroma Output (Pin 13) Sync Input (Pin 2)

10.0

9.5 (g) 4.35 4.0 3.65 (h) 5.2 Luminance Output (Pin 6) Chroma Input (Pin 10)

4.3 (i) 2.6 2.1 Luminance Input (Pin 8)

8

MC1377
Color Reference Oscillator/Buffer As stated earlier in the general description, there is an on­board common collector Colpitts color reference oscillator with the transistor base at Pin 17 and the emitter at Pin 18. When used with a common low­cost TV crystal and capacitive divider, about 0.6 Vpp will be developed at Pin 17. The frequency adjustment can be done with a series 30 pF trimmer capacitor over a total range of about 1.0 kHz. Oscillator frequency should be adjusted for each unit, keeping in mind that most monitors and receivers can pull in 1200 Hz. If an external color reference is to be used exclusively, it must be continuous. The components on Pins 17 and 18 can be removed, and the external source capacitively coupled into Pin 17. The input at Pin 17 should be a sine wave with amplitude between 0.5 Vpp and 1.0 Vpp. Also, it is possible to do both; i.e., let the oscillator "free run" on its own crystal and override with an external source. An extra coupling capacitor of 50 pF from the external source to Pin 17 was adequate with the experimentation attempted. Voltage Controlled 90° The oscillator drives the (B­Y) modulator and a voltage controlled phase shifter which produces an oscillator phase of 90° ± 5° at the (R­Y) modulator. In most situations, the result of an error of 5° is very subtle to all but the most expert eye. However, if it is necessary to adjust the angle to better accuracy, the circuit shown in Figure 11 can be used. Pulling Pin 19 up will increase the (R­Y) to (B­Y) angle by about 0.25°/µA. Pulling Pin 19 down reduces the angle by the same sensitivity. The nominal Pin 19 voltage is about 6.3 V, so even though it is unregulated, the 12 V supply is best for good control. For effective adjustment, the simplest approach is to apply RGB color bar inputs and use a vectorscope. A simple bar generator giving R, G, and B outputs is shown in Figure 26.

Figure 9. Ramp/Burst Gate Generator
5.0 Pin 1 Ramp Voltage (Vdc)

1.3 1.0 0

Burst Stop Burst Start

Sync (Pin 2)

0

5.5 8.5

Time (µs)

50

63.5

Residual Feedthrough Components As shown in Figure 9(d), the composite output at Pin 9 for fully saturated color bars is about 2.6 Vpp, output with full chroma on the largest bars (cyan and red) being 1.7 Vpp. The typical device, due to imperfections in gain, matrixing, and modulator balance, will exhibit about 20 mVpp residual color subcarrier in both white and black. Both residuals can be reduced to less than 10 mVpp for the more exacting applications. The subcarrier feedthrough in black is due primarily to imbalance in the modulators and can be nulled by sinking or sourcing small currents into clamp Pins 11 and 12 as shown in Figure 12. The nominal voltage on these pins is about 4.0 Vdc, so the 8.2 V regulator is capable of supplying a pull up source. Pulling Pin 11 down is in the 0° direction, pulling it up is towards 180°. Pulling Pin 12 down is in the 90° direction, pulling it up is towards 270 °. Any direction of correction may be required from part to part. White carrier imbalance at the output can only be corrected by juggling the relative levels of R, G, and B inputs

for perfect balance. Standard devices are tested to be within 5% of balance at full saturation. Black balance should be adjusted first, because it affects all levels of gray scale equally. There is also usually some residual baseband video at the chroma output (Pin 13), which is most easily observed by disabling the color oscillator. Typical devices show 0.4 Vpp of residual luminance for saturated color bar inputs. This is not a major problem since Pin 13 is always coupled to Pin 10 through a bandpass or a high pass filter, but it serves as a warning to pay proper attention to the coupling network. Figure 10. Adjusting Modulator Angle
12Vdc 19 0.01µF 220k 10k

MOTOROLA ANALOG IC DEVICE DATA

9

MC1377
Figure 11. Nulling Residual Color in Black
VB 12 470k 10k

11 470k

10k

Figure 14(a) shows the output of the MC1377 with low resolution RGB inputs. If no bandwidth reduction is employed then a monitor or receiver with frequency response shown in Figure 14(b), which is fairly typical of non­comb filtered monitors and receivers, will detect an incorrect luma sideband at X. This will result in cross­talk in the form of chroma information in the luma channel. To avoid this situation, a simpler bandpass circuit as shown in Figure 15(a), can be used. Figure 13. MC1377 Output with Low Resolution RGB Inputs
X X X X

VB

Figure 12. Delay of Chroma Information
Luminance

Gain

1.0

2.0

3.0 3.58 4.0

5.0

Chroma

(a) Encoder Output with Low Resolution Inputs and No Bandpass Transformer

The Chroma Coupling Circuits With the exception of S­VHS equipped monitors and receivers, it is generally true that most monitors and receivers have color IF 6.0 dB bandwidths limited to approximately ±0.5 MHz. It is therefore recommended that the encoder circuit should also limit the chroma bandwidth to approximately ±0.5 MHz through insertion of a bandpass circuit between Pin 13 and Pin 10. However, if S­VHS operation is desired, a coupling circuit which outputs the composite chroma directly for connection to a S­VHS terminal is given in the S­VHS application (see Figure 19). For proper color level in the video output, a ±0.5 MHz bandwidth and a midband insertion loss of 3.0 dB is desired. The bandpass circuit shown in Figure 7, using the TOKO fixed tuned transformer, couples Pin 10 to Pin 13 and gives this result. However, this circuit introduces about 350 ns of delay to the chroma information (see Figure 13). This must be accounted for in the luminance path. A 350 ns delay results in a visible displacement of the color and black and white information on the final display. The solution is to place a delay line in the luminance path from Pins 6 to 8, to realign the two components. A normal TV receiver delay line can be used. These delay lines are usually of 1.0 k to 1.5 k characteristic impedance, and the resistors at Pins 6 and 8 should be selected accordingly. A very compact, lumped constant delay line is available from TDK (see Figure 25 for specifications). Some types of delay lines have very low impedances (approx. 100 ) and should not be used, due to drive and power dissipation requirements. In the event of very low resolution RGB, the transformer and the delay line may be omitted from the circuit. Very low resolution for the MC1377 can be considered RGB information of less than 1.5 MHz. However, in this situation, a bandwidth reduction scheme is still recommended due to the response of most receivers.
Gain

X

X

1.0

2.0

3.0 3.58 4.0

5.0

(b) Standard Receiver Response A final option is shown in Figure 15(b). This circuit provides very little bandwidth reduction, but enough to remove the chroma to luma feedthrough, with essentially no delay. There is, however, about a 9 dB insertion loss from this network. It will be left to the designer to decide which, if any, compromises are acceptable. Color bars viewed on a good monitor can be used to judge acceptability of step luminance/chrominance alignment and step edge transients, but signals containing the finest detail to be encountered in the system must also be examined before settling on a compromise. The Output Stage The output amplifier normally produces about 2.0 Vpp and is intended to be loaded with 150 as shown in Figure 16. This provides about 1.0 Vpp into 75 , an industry standard level (RS­343). In some cases, the input to the monitor may be through a large coupling capacitor. If so, it is necessary to connect a 150 resistor from Pin 9 to ground to provide a low impedance path to discharge the capacitor. The nominal average voltage at Pin 9 is over 4.0 V. The 150 dc load causes the current supply to rise another 30 mA (to approximately 60 mA total into Pin 14). Under this (normal) condition the total device dissipation is about 600 mW. The calculated worst case die temperature rise is 60°C, but the typical device in a test socket is only slightly warm to the touch at room temperature. The solid copper 20­pin lead frame in a printed circuit board will be even more effectively cooled.

10

MOTOROLA ANALOG IC DEVICE DATA

MC1377
Figure 14. Optional Chroma Coupling Circuits
0.001 13 22µH a) Insertion Loss: 3.0 dB a) Bandwidth: ± 1.0 MHz a) Delay: 100 ns 39pF 1.0k 0.001 10

with an effective source impedance of less than 1.0 . This regulator is convenient for a tracking dc reference for dc coupling the output to an RF modulator. Typical turn­on drift for the regulator is approximately ­30 mV over 1 to 2 minutes in otherwise stable ambient conditions.

Figure 15. Output Termination

Output 56pF 13 4.7k b) Insertion Loss: 9.0 dB b) Bandwidth: ± 2.0 MHz b) Delay: 0 27pF 1.0k 0.001 10 9 4.7k MC1377 75

75 Cable

Monitor

75

Power Supplies The MC1377 is designed to operate from an unregulated 10 V to 14 Vdc power supply. Device current into Pin 14 with open output is typically 35 mA. To provide a stable reference for the ramp generator and the video output, a high quality 8.2 V regulator can supply up to 10 mA for external uses,

SUMMARY
The preceding information was intended to detail the application and basis of circuit choices for the MC1377. A complete MC1377 application with the MC1374 VHF modulator is illustrated in Figure 17. The internal schematic diagram of the MC1377 is provided in Figure 8.

Figure 16. Application with VHF Modulator
470 47k 470 PAL NTSC 17 3.58MHz 5­25 10 + S R G 3.3k B 47 0.001 0.1 100 220 1.2k 14 Color Bandpass Transformer (Fig. 24) +12Vdc 0.1 11 12 19 15 0.1 .01 6 7 .01 Video Out Audio In 1.2k 13 15 15 15 0.1 + + + 3 4 5 9 10 8 75 + 1.0 Delay Line 14 5 10 13 1 220 18 220 2 53k 0.1 6.8k 120 10µH 0.001 mica 2 0.001 11 5.1k 22 47 16 20 8.2VRef 2.7k 47 3 2.2k 1 9 0.001 RF Out 22 6 7 4 8 75 0.33µH 0.33µH VCC 0.001 56 470 0.12µH +12Vdc

MC1377

MC1374
12

MOTOROLA ANALOG IC DEVICE DATA

11

MC1377
APPLICATIONS INFORMATION
S­VHS In full RGB systems (Figure 18), three information channels are provided from the signal source to the display to permit unimpaired image resolution. The detail reproduction of the system is limited only by the signal bandwidth and the capability of the color display device. Also, higher than normal sweep rates may be employed to add more lines within a vertical period and three separate projection picture tubes can be used to eliminate the "shadow mask" limitations of a conventional color CRT. Figure 21 shows the "baseband" components of a studio NTSC signal. As in the previous example, energy is concentrated at multiples of the horizontal sweep frequency. The system is further refined by precisely locating the color subcarrier midway between luminance spectral components. This places all color spectra between luminance spectra and can be accomplished in the MC1377 only if "full interlaced" external color reference and sync are applied. The individual components of luminance and color can then be separated by the use of a comb filter in the monitor or receiver. This technique has not been widely used in consumer products, due to cost, but it is rapidly becoming less expensive and more common. Another technique which is gaining popularity is S­VHS (Super VHS). In S­VHS, the chroma and luma information are contained on separate channels. This allows the bandwidth of both the chroma and luma channels to be as wide as the monitors ability to reproduce the extra high frequency information. An output coupling circuit for the composite chroma using the TOKO transformer is shown in Figure 19. It is composed of the bandpass transformer and an output buffer and has the frequency performance shown in Figure 20. The composite output (Pin 9) then produces the luma information as well as composite sync and blanking.

Figure 17. Spectra of a Full RGB System

Figure 19. Frequency Response of Chroma Coupling Circuit

Red

Green

Blue 1.0 2.0 3.0 f, FREQUENCY (MHz) 4­8

Figure 18. S­VHS Output Buffer
+12Vdc 1.0µF 16k 100/62pF* 13 220 ** +12Vdc 0.1µF
**Refers to different component values used for NTSC/PAL (3.58 MHz/4.43 MHz). **Toko 166NNF­1026AG

­6 dB

33 75 Composite Chroma Out f, MHz 2.7 3.66 4.5

1000pF 47/33pF*

3.3k

8.2k

6.8k

12

MOTOROLA ANALOG IC DEVICE DATA

MC1377
I/Q System versus (R­Y)/(B­Y) System The NTSC standard calls for unequal bandwidths for I and Q (Figure 21). The MC1377 has no means of processing the unequal bandwidths because the I and Q axes are not used (Figure 22) and because the outputs of the (R­Y) and the (B­Y) modulators are added before being output at Pin 13. Therefore, any bandwidth reduction intended for the chroma information must be performed on the composite chroma information. This is generally not a problem, however, since most monitors compromise the standard quite a bit. Figure 23 shows the typical response of most monitors and receivers. This figure shows that some crosstalk between luma and chroma information is always present. The acceptability of the situation is enhanced by the limited ability of the CRT to display information above 2.5 MHz. If the signal from the MC1377 is to be used primarily to drive conventional non­comb filtered monitors or receivers, it would be best to reduce the bandwidth at the MC1377 to that of Figure 23 to lessen crosstalk.

Figure 20. NTSC Standard Spectral Content
Color Subcarrier Sound Subcarrier

Figure 21. Color Vector Relationship (Showing Standard Colors)
Red (R­Y) (104°) (90°) Purple (61°)

Luminance Video Amplitude

I

Q

I (123°) Yellow (168°) 0 1.0 2.0 3.0 f, FREQUENCY (MHz) 4.0 Color Burst (180°)

Q (33°)

(B­Y) 0° Blue (348°)

Green (241°)

Cyan (284°)

Figure 22. Frequency Response of Typical Monitor/TV
Chroma Channel Gain Luminance Channel

1.0

2.0 3.0 3.58 4.0 f, FREQUENCY (MHz)

MOTOROLA ANALOG IC DEVICE DATA

13

MC1377
Figure 23. A Prototype Chroma Bandpass Transformer Toko Sample Number 166NNF­10264AG
3.5mm ± 0.5mm 0.7mm Pin Diameter

15.0mm Max

7 ± 0.2mm

3 S 2 1 (Drawing Provided By: Toko America, Skokie, IL)

4 S

5 Unloaded Q (Pins 1­3): 15 @ 2.5 MHz Inductance: 30 µH ± 10% @ 2.5 MHz Turns: 60 (each winding) Wire: #38 AWG (0.1 m/m)

Connection Diagram Bottom View

Figure 24. A Prototype Delay Line TDK Sample Number DL122301D­1533
1.26 Max 32.0

0.35 Max 9.0 0.93 Max 23.5

*Marking

0.394 ± 0.06 10.0 ± 1.5 0.788 ± 0.08 20.0 ± 2.0

0.2 ± 0.04 5.0 ± 1.0

0.026 ± 0.002 0.65 ± 0.33

0.8 Radius Max 2.0

Item *Marking: Part Number, Manufacturer's Identification, *Marking: Date Code and Lead Number. *Marking: Skokie, IL (TDK Corporation of America) Time Delay Impedance Resistance Transient Response with 20 ns Rise Time Input Pulse

Specifications 400 ns ± 10% 1200 ± 10% Less Than 15 Preshoot: 10% Max Overshoot: 10% Max Rise Time: 120 ns Max 3 dB Max at 6.0 MHz

Attenuation

14

MOTOROLA ANALOG IC DEVICE DATA

MC1377
Figure 25. RGB Pulse Generator

BNC

4.7µF 10k 2N4403

Composite Blanking

2.2k

10k ­5.0V Reg 10k MC74LS112A 0.1 2N 4401 0.1 2.2 k 0.1 0.1 1/2 MC74LS112A

3.3k 0.1 MC1455 8 7 3.3k 2 6 1 5 10k 750 pF 3 4

3J 2k 154kHz 1C

15S 16 Q5

11J 12k

14S Q9

3J 2k

15S 16

Q6 R4

13C 8

Q7 R10

1C R4 8

Q6

10 k 0.1

Freq Adj

1.8k

680 BNC Blue Output

1.8k

680 BNC Red Output

1.8k

680 BNC Green Output

2N4401

2N4401 0.1

2N4401 0.1

470 0.1

470

470

RGB Pulse Generator Timing Diagram for NTSC
64 µs Composite Blanking Input

154 kHz Clock White Blue Output 1.0 Vpp Yellow Cyan Green Magenta Red Blue Black

Red Output

Green Output

MOTOROLA ANALOG IC DEVICE DATA

15

MC1377
Figure 26. Printed Circuit Boards for the MC1377

(CIRCUIT SIDE)

(COMPONENT SIZE)

Figure 27. Color TV Encoder ­ Modulator
470 47k 470 VCC 0.001 17 3.58MHz 5­25 S R G 3.3k B 220 18 220 0.1 + 2 3 4 5 9 10 0.1 47 10264 AG 0.001 13 100 220 1.2k 14 11 12 19 15 0.1 VCC (+12V) 0.1 .01 .01 6 7 Video Out Audio In 1.2k 8 400ns 75k + 1.0 14 5 10 13 1 0.001 mica 2 0.001 11 5.1k 54k 0.1 6.8k 120 10µH 16 47 3 22 47 22 20 8.2Vdc 2.7k 2.2k 1 9 6 7 4 8 75 0.33µH 0.33µH 470 0.12µH 56 VCC (+12V)

0.001

RF Out

+ 15µF + 15µF + 15µF

MC1374
12

MC1377

16

MOTOROLA ANALOG IC DEVICE DATA

MC1377
OUTLINE DIMENSIONS
P SUFFIX PLASTIC PACKAGE CASE 738­03 ISSUE E
11

­A­
20

B
1 10

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01

C
DIM A B C D E F G J K L M N

­T­
SEATING PLANE

K M E G F D
20 PL

N J 0.25 (0.010)
M 20 PL

0.25 (0.010) T A
M

M

T B

M

­A­
20 11

DW SUFFIX PLASTIC PACKAGE CASE 751D­04 (SO­20L) ISSUE E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0_ 7_ 0.395 0.415 0.010 0.029

­B­
1 10

10X

P 0.010 (0.25)
M

B

M

20X

D
M

0.010 (0.25)

T A

S

B

J
S

F R X 45 _ C ­T­
18X SEATING PLANE

G

K

M

MOTOROLA ANALOG IC DEVICE DATA

17

MC1377

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

How to reach us: USA / EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1­800­441­2447 MFAX: [email protected] ­ TOUCHTONE (602) 244­6609 INTERNET: http://Design­NET.com

JAPAN: Nippon Motorola Ltd.; Tatsumi­SPD­JLDC, Toshikatsu Otsuki, 6F Seibu­Butsuryu­Center, 3­14­2 Tatsumi Koto­Ku, Tokyo 135, Japan. 03­3521­8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852­26629298

18



MC1377/D MOTOROLA ANALOG IC DEVICE DATA

*MC1377/D*