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Agilent EEsof EDA
Design and Measurement of a 400 MHz Frequency
Synthesizer: Accuracy Proof
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Eagleware PN 12
Design and
Measurement of a
400 MHz Frequency
Synthesizer:
Accuracy Proof
Product Note
Design, simulation and measurement of a frequency synthesizer using a National
Semiconductor LMX1501 IC.
PN12
400 MHz PLL Design Example
for the pre-selected components must
Design and Measurement of a 400 be input to the program. All PLL input
MHz Frequency Synthesizer prompts are shown in Figure 1.
Synthesizer design is often a tradeoff
between channel switching time, phase
noise performance, and reference
sideband suppression. For this reason,
deciding on the best loop bandwidth
and phase margin for a particular
design is not always a simple matter.
Eagleware's PLL program integrates
traditional frequency domain analysis
with true time domain transient
simulation for quick evaluation of a
variety of designs. Phase noise plots
show each component's contribution to
the total noise spectrum for easy
identification of which blocks need
improvement.
In this product note, a frequency
synthesizer tunable from 395 to 405
MHz is designed. The National
Semiconductor LMX1501 synthesizer IC
Figure 1: PLL Input Tabs
is used with the following specifications: