arete_arix IOPM Hardware Spec Nov88 free download

File name IOPM_Hardware_Spec_Nov88.pdf

Arix Corporation I/O Processor Module Hardware Spec, ver 3.0 Curt Berg, 18 Nov 1988 Arix Systems Corp - CONFIDENTIAL CONTENTS 1. Introduction . . . . . . . . . . . 2 2. IOPM hardware description overview :3 2.1 System bus interface section 4 2.2 Processor . . . 4 2.3 IOPM local bus . . . 4 2.4 Memory. refresh . . . 5 2.5 Device board interface 5 2.6 EPROM, ControVStatus registers 5 3. System wide addressing 5 4. System bus interface . . . . . . . 6 4.1 System bus interface overview 6 4.2 Supported System bus commands 7 4.3 Input buffer section 7 4.4 Output buffer section . . I) 4.5 Command sequencer . . 11 4.6 Address translation map 11 5. IOPM local bus arbiter 13 5.1 Bus priorities . . . 13 5.2 Bus timeout . . . . 13 5.3 Suspended operation 13 6. Device board interface. . 15 6.1 Supported functions 15 6.2 Classes of device boards 16 6.3 Device interface signals . 17 6.4 Device Interface signal description 18 7. 68030 Processor . . . . . 20 7.1 Power up and Reset . . . . . . 20 7.2 Bus errors . . . . . . . . . . . 20 7.3 Atomic operations: TAS, CAS, CAS 2 instructions 20 7.4 68030 Interrupts 21 8. Local memory 21 8.1 Memory refresh 22 9. ControVStatus Registers 23 9.1 Error Status Register 23 9.2 Status Registers One 23 9.3 Diagnostic Pipeline Registers 24 9.4 Control Registers 2..J 9.5 IOPM LED indicators 26 10. Free running counter 11. Console Support 26 12. Performance of bus cycles 27 13. Power-up and reset . 29 13.1 Power on reset. 29 13.2 Board Reset . . 29 -i- 13.3 Device Board reset. out 29 13.4 Device Board reset in . 29 13.5 68030 Processor reset . 29 14. Clock distribution .