arete_arix System 90 Hardware Description Sep88 free download

File name System_90_Hardware_Description_Sep88.pdf

- 1- Arix Corporation System90 Hardware Description 19 September 1988 II 8 C~5 Arix Corporation - CON"IDENTIAL - 1- 1. Arix System90 Hardware Description 1.1 General This document is intended as a technical overview of the Arix System90. It identifies the major hardware components of the system and describes their function. Additional documents detail the function and operation of the major system components. 1.2 System90 Overview The Arix System90 is a high performance general purpose computer system. The system is intended to enhance Arix's position as a vendor of high performance on-line multi- processor UNIX systems. The system logic is composed of a computational subsystem and an 110 subsystem. The computational subsystem is newly designed specifically for the System90 while the 110 subsystem is largely retained from the AlOOO family. The system is packaged in a series of 22" wide modular cabinets. The primary cabinet contains the computational subsystem. Additional cabinets contain either 110 subsystems or peripherals. Arix Corporation - CONFIDENTIAL -2- 1.3 Related Documents The following related documents detail the hardware operation of various major system components. S90 System Busses - Functional Description S90 Service Processor Module - Functional Description S9068020 Processor Module - Functional Description S90 Memory Module - Functional Description S90 110 Module - Functional Description S90 AlOOO 110 Adaptor - Functional Description Arix Corporation ~ CONFIDENTIAL -3- 2. Computational Suh!llystem The System90 Computational Subsystem (CSS) consists of a cluster of tightly coupled processors and memory modules on a high speed system bus. Also in the CSS are 110 modules which adapt the main system bus to 110 buses. The major components of the CSS are the Processor Modules, Memory Modules, 110 Modules, Service Processor Module, CSS Arbiter, and CSS backplane. 2.1 CSS Bus The CSS bus is the backbone of the System90. It is a 64 bit wide, high speed synchronous data transfer bus. It is designed to accommodate up to 16 modules; either Processor Modules, Memory Modules, or 110 Modules. TIle CSS bus is implemented as an N-port time division multiplexed transmission switch. The bus supports read and write operations between all attached modules. Read operations transfer 64 bits and write operations transfer up to 32 bits. The bus supports concurrent operations to and from the modules on the bus. This allows overlapping cycles on individual modules and provides enough bus bandwidth to minimize contention for this system resource. This allows the support of multiple high performance processors with near linear incremental perform