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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: · The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC · The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4104B MSI Quadruple low to high voltage translator with 3-state outputs Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Quadruple low to high voltage translator with 3-state outputs DESCRIPTION The HEF4104B quadruple low voltage to high voltage translator with 3-state outputs provides the capability of interfacing low voltage circuits to high voltage circuits, such as low voltage LOCMOS and TTL to high voltage LOCMOS. It has four data inputs (I0 to I3), an active HIGH output enable input (EO), four data outputs (O0 to O3) and their complements (O0 to O3). With EO HIGH, O0 to O3 and O0 to O3 are in the low impedance ON-state, either HIGH or LOW as determined by I0 to I3; with EO LOW, O0 to O3 and O0 to O3 are in the high impedance OFF-state. HEF4104B MSI The device uses a common negative supply (VSS) and separate positive supplies for inputs (VDDI) and outputs (VDD0). VDDI must always be less than or equal to VDDO, even during power turn-on and turn-off. For the permissible operating range of VDDI and VDDO see graph Fig.4. Each input protection circuit is terminated between VDDO and VSS. This allows the input signals to be driven from any potential between VDDO and VSS, without regard to current limiting. When driving from potentials greater than VDDO or less than VSS, the current at each input must be limited to 10 mA. Fig.2 Pinning diagram. HEF4104BP(N): HEF4104BD(F): HEF4104BT(D): 16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING I0 to I3 EO O0 to O3 O0 to O3 data inputs output enable input data outputs complementary data outputs FAMILY DATA, IDD LIMITS category MSI Fig.1 Functional diagram. See Family Specifications January 1995 2 Philips Semiconductors Product specification Quadruple low to high voltage translator with 3-state outputs HEF4104B MSI Fig.3 Logic diagram. January 1995 3 Philips Semiconductors Product specification Quadruple low to high voltage translator with 3-state outputs AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times 20 ns VDD V Propagation delays In On, On HIGH to LOW 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 3-state propagation delays Output disable times EO On, On HIGH 5 10 15 5 LOW Output enable times EO On, On HIGH 5 10 15 5 LOW 10 15 tPZL tPZH 195 95 80 195 95 80 395 195 165 395 190 160 ns ns ns ns ns ns 10 15 tPLZ tPHZ 70 55 60 70 55 55 135 110 120 135 105 110 ns ns ns ns ns ns 10 15 tTLH tTHL tPLH tPHL 170 80 65 170 80 70 60 30 20 60 30 20 340 160 135 340 160 140 120 60 40 120 60 40 ns ns ns ns ns ns ns ns ns ns ns ns 143 ns 69 ns 57 ns 143 n