Motorola 4561 free download

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14561B 9's Complementer The MC14561B 9's complementer is a companion to the MC14560B NBCD adder to allow BCD subtraction. A BCD number (8­4­2­1 code) is applied to the inputs (A1 = 20, A2 = 21, A3 = 22, A4 = 23). If the complement control (Comp) is low, the BCD number appears at the outputs unmodified. The complement disable (Comp) allows the complement control to be gated, or an inverted control signal to be used. If the complement input is high and the disable input low, the 9's complement of the number is displayed at the outputs. The zero control (Z), when high, forces the outputs low regardless of the state of the other inputs. When the MC14561B is used to perform BCD subtraction in conjunction with the MC14560B NBCD adder, the complement control becomes an add/subtract control. · All Inputs Buffered · Supply Voltage Range = 3.0 Vdc to 18 Vdc · Capable of Driving Two Low­Power TTL Loads or One Low­Power Schottky TTL Load Over the Rated Temperature Range MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol VDD Parameter DC Supply Voltage MC14XXXBCP MC14XXXBCL MC14XXXBD L SUFFIX CERAMIC CASE 632 P SUFFIX PLASTIC CASE 646 D SUFFIX SOIC CASE 751A ORDERING INFORMATION Plastic Ceramic SOIC ООООООООООООООООООООО ООООООООООООООООООООО ООООООООООООООООООООО ООООООООООООООООООООО Value Unit V V ­ 0.5 to + 18.0 Vin, Vout Iin, Iout PD Tstg TL Input or Output Voltage (DC or Transient) ­ 0.5 to VDD + 0.5 ± 10 500 ­ 65 to + 150 260 Input or Output Current (DC or Transient), per Pin Power Dissipation, per Package Storage Temperature Lead Temperature (8­Second Soldering) mA mW TA = ­ 55° to 125°C for all packages. PIN ASSIGNMENT A1 A2 A3 A4 COMP COMP VSS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD F1 F2 F3 F4 Z NC _C _C * Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic "P and D/DW" Packages: ­ 7.0 mW/_C From 65_C To 125_C Ceramic "L" Packages: ­ 12 mW/_C From 100_C To 125_C NC = NO CONNECTION TRUTH TABLE Z 0 0 0 0 1 Comp 0 0 1 1 X Comp 0 1 1 0 X A1 0 A2 0 A2A3 + A2A3 0 A2A3A4 0 Complement Zero A1 A2 A3 A4 Straight­through F1 F2 F3 F4 Mode X = Don't Care. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high­impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. v v REV 3 1/94 ©MOTOROLA CMOS LOGIC DATA Motorola, Inc. 1995 MC14561B 1 ОООООООООООООООООООООООООООООООООО ОООООООООООООООООООООООООООООООООО ОООООООООООООООООООООООООООООООООО ОООООООООООООООООООООООООООООООООО ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Characteristic Symbol VOL VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 1