Philips TDA8415 free download

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INTEGRATED CIRCUITS DATA SHEET TDA8415 TV and VTR stereo/dual sound processor with integrated filters and I2C-bus control Preliminary specification File under Integrated Circuits, IC02 May 1989 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor with integrated filters and I2C-bus control TDA8415 GENERAL DESCRIPTION The TDA8415 is a processor of stereo/dual language signals (B/G-standard) for stereo sound television receivers and VTRs, using the switched-capacitor technique. The AF signals at the TDA8415 inputs must be "(L+R)/2" or "language A" on one channel and "R" or "language B" on the second channel (where L = left and R = right). The carrier frequency of the second channel is also modulated by an identification signal (stereo or dual sound). The device is controlled by a microcomputer via the two-line, bidirectional I2C-bus. Features · Use of the switched-capacitor technique for signal processing · Small amount of peripheral components · Integrated anti-aliasing filters · Low distortion AF signal handling · Integrated de-emphasis with a time constant of 50 µs · Function and software are compatible with the TDA8405 · Two general purpose output ports · Full ESD protection QUICK REFERENCE DATA PARAMETER Supply voltage (pin 15) Supply current (pin 15) AF output signal (RMS value) (pins 11 to 14) Weighted signal-to-noise ratio of the AF output signals (CCIR 468/3) Crosstalk attenuation stereo mode at dual sound mode at Pilot signal input sensitivity Total harmonic distortion PACKAGE OUTLINE 20-lead DIL; plastic (SOT146);SOT146-1; 1996 December 18. f = 1 kHz S Vi THD 40 70 - - - - 2.5 0.1 - - - - dB dB mV % f = 40 Hz to 12.5 kHz DS (S+W)/W 70 - - dB Vo - 2 - V CONDITION IP SYMBOL VP - - MIN. TYP. 12 10 - - MAX. V mA UNIT May 1989 2 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor with integrated filters and I2C-bus control TDA8415 May 1989 3 Fig.1 Block diagram. Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor with integrated filters and I2C-bus control TDA8415 Fig.2 Input and output loading diagram. May 1989 4 Philips Semiconductors Preliminary specification TV and VTR stereo/dual sound processor with integrated filters and I2C-bus control PINNING 1 2 3 4 5 6 7 8 9 10 Control port C1 SDA, serial data line SCL, serial clock line Digital ground (0 V) Not connected, but reserved Sound channel input AF2 (E2) Sound channel input AF1 (E1) External AF input (E4) External AF input (E3) (I2C-bus) (I2C-bus) 11 12 13 13 15 16 17 18 19 20 Output A4 AF 2 output Output A3 AF 2 output Output A2 AF 1 output Output A1 AF 1 output Supply voltage VP Analogue ground (0 V) TDA8415 Oscillator input (or quartz) Ripple rejection improvement Mute input Control port C2 Not connected, but reserved FUNCTIONAL DESCRIPTION Anti-aliasing filters Frequency band limitation is performed by a second order Sallen and Key low-pass filter