ST STV7778 free download

File name STV7778S.pdf

STV7778S DEFLECTION PROCESSOR FOR MULTISYNC MONITOR . . . . . . . . . . . . . . . . . . . . . HORIZONTAL DUAL PLL CONCEPT SELF-ADAPTIVE (30 TO 70kHz) X-RAY PROTECTION INPUT DC ADJUSTABLE DUTY-CYCLE INTERNAL 1st PLL LOCK/UNLOCK IDENTIFICATION WIDE RANGE DC CONTROLLED H-POSITION ON/OFF SWITCH (FOR PWR MANAGEMENT) TWO H-DRIVE POLARITIES VERTICAL VERTICAL RAMP GENERATOR 45 TO 120Hz AGC LOOP DC CONTROLLED V-AMP, V-POS, S-AMP AND S-CENTERING ON/OFF SWITCH B+ REGULATOR INTERNAL PWM GENERATOR FOR B+ CURRENT MODE STEP-UP CONVERTER DC ADJUSTABLE B+ VOLTAGE OUTPUT PULSES SYNCHRONISED ON HORIZONTAL FREQUENCY INTERNAL MAX CURRENT LIMITATION EWPCC VERTICAL PARABOLA GENERATOR WITH DC CONTROLLED KEYSTONE AND AMPLITUDE GENERAL COMPARED WITH THE STV7778, THE STV7778S HAS AN INTERNAL METAL SHIELD PROTECTION AGAINST OVERVOLTAGE. POS/NEG H AND V SYNC POL SEPARATED H AND V TTL INPUT SAFETY BLANKING OUTPUT The goal of this IC is to control all the functions related to the horizontal and vertical deflection in a multimodes or multisync monitor. As can be seen in the block diagram, the STV7778S includes the following functions : - Positive or Negative sync polarities, - Auto-sync horizontal processing, - H-PLL lock/unlock identification, - Auto-sync Vertical processing, - East/West signal processing block, - B+ controller, - Safety blanking output. An internal metal shield give to the STV7778S more immunity against electromagnetic and electrostatic fields, and therefore, additional safety for critical applications (for example, in case of CRTs with small coated area). SHRINK42 (Plastic Package) ORDER CODE : STV7778S DESCRIPTION The STV7778S is a monolithic integrated circuit assembled in a 42 pins shrunk dual in line plastic package. September 1998 1/11 STV7778S PIN CONNECTIONS PLL2C H-DUTY HFLY HGND HREF NC NC NC NC C0 R0 PLL1F HLOCK-CAP FH-MIN H-POS XRAY-IN HSYNC VCC GND H-OUTEM H-OUTCOL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 ISENSE COMP REGIN B+-ADJ KEYST E/W-AMP E/WOUT PLL1INHIB VSYNC V-POS VDCOUT V-AMP VOUT VS-CENT VS-AMP VCAP VREF VAGCCAP VDND 7778S-01.EPS SBLKOUT B+OUT 2/11 STV7778S PIN-OUT DESCRIPTION Pin N° 1 2 Name PLL2C H-DUTY Second PLL Loop Filter DC Control of Horizontal Drive Output Pulse Duty-cycle. If this pin is grounded, the horizontal and vertical outputs are inhibited. By connecting a capacitor on this pin a soft-start function may be realized on h-drive output. Horizontal Flyback Input (Positive Polarity) Horizontal Section Ground. Must be connected only to components related to H blocks. Horizontal Section Reference Voltage. Must be filtered by capacitor to Pin 4 Function 3 4 5 6 7 8 9 10 11 12 13 H-FLY H-GND H-REF NC NC NC NC C0 R0 PLL1F HLOCK-CAP Horizontal Oscillator Capacitor. To be connected to Pin 4. Horizontal Oscillator Resistor. To be connected to Pin 4. First PLL Loop Filter. To be connected to Pin 4. First PLL Lock/Unlock Time Constant Capacitor. Ca