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INTEGRATED CIRCUITS DATA SHEET TDA8444 Octuple 6-bit DAC with I2C-bus Product specification File under Integrated Circuits, IC01 March 1991 Philips Semiconductors Product specification Octuple 6-bit DAC with I2C-bus GENERAL DESCRIPTION The TDA8444 comprises eight digital-to-analogue converters (DACs) each controlled via the two-wire I2C-bus. The DACs are individually programmed using a 6-bit word to select an output from one of 64 voltage steps. The maximum output voltage of all DACs is set by the input Vmax and the resolution is approximately Vmax/64. At power-on all DAC outputs are set to their lowest value. The I2C-bus slave receiver has a 7-bit address of which 3 bits are programmable via pins A0, A1 and A2. Features · Eight discrete DACs · I2C-bus slave receiver · 16-pin DIL package. QUICK REFERENCE DATA PARAMETER Supply voltage Supply current Total power dissipation Effective range of Vmax input DAC output voltage range Step value of 1 LSB Vmax = VP; IO = -2 mA PACKAGE OUTLINE 16-lead DIL; plastic (SOT38); SOT38-1; 1996 July 23. VLSB 70 160 VO 0.1 - VP = 12 V Vmax 1 - no loads; Vmax = VP; all data = 00 no loads; Vmax = VP; all data = 00 Ptot - 150 ICC 8 12 CONDITIONS SYMBOL VP MIN. 10.8 TYP. 12.0 TDA8444 MAX. 13.2 15 - 10.5 UNIT V mA mW V VP-0.5 V 250 mV March 1991 2 Philips Semiconductors Product specification Octuple 6-bit DAC with I2C-bus TDA8444 Fig.1 Block diagram. PINNING PIN 1 2 3 4 5 6 7 8 9-16 VP Vmax SDA SCL A0 A1 A2 GND DAC0-7 ground analogue voltage outputs Fig.2 Pinning diagram programmable address bits for I2C-bus slave receiver SYMBOL DESCRIPTION positive supply voltage control input for DAC maximum output voltage I2C-bus serial data input/output I2C-bus serial data clock March 1991 3 Philips Semiconductors Product specification Octuple 6-bit DAC with I2C-bus FUNCTIONAL DESCRIPTION I2C-bus TDA8444 The TDA8444 I2C-bus interface is a receive-only slave. Data is accepted from the I2C-bus in the following format: S 0 1 0 0 A2 A1 A0 0 ----> A I3 I2 I1 I0 SD SC SB SA A <----instruction byte ----> X X D5 D4 D3 D2 D1 D0 A first data byte ----> P <----Where: S P A X = = = = address byte <----= = = start condition stop condition acknowledge don't care A2, A1, A0 I3, I2, I1, I0 SD, SC, SB, SA programmable address bits instruction bits subaddress bits data bits D5, D4, D3, D2, D1, D0 = Fig.3 Data format. Address byte Valid addresses are 40, 42, 44, 46, 48, 4A, 4C, 4E (hexadec), depending on the programming of bits A2, A1 and A0. With these addresses, up to eight TDA8444 ICs can be operated independently from one I2C-bus. No other addresses are acknowledged by the TDA8444. Instruction and data bytes Valid instructions are 00 to 0F and F0 to FF (hexadec); the TDA8444 will not respond to other instruction values. Instructions 00 to 0F cause auto-incrementing of the subaddress (bits SD to SA) when more than one data byte is sent within one transmission. With auto-incrementing, the first data byte is written in