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TEA2164S SWITCH MODE POWER SUPPLY PRIMARY CIRCUIT . . . . . . . POSITIVE AND NEGATIVE OUTPUT CURRENT UP TO 1.2A AND ­ 1.7A A TWO LEVEL COLLECTOR CURRENT LIMITATION COMPLETE TURN OFF AFTER LONG DURATION OVERLOADS UNDER AND OVER VOLTAGE LOCK-OUT SOFT START BY PROGRESSIVE CURRENT LIMITATION DOUBLE PULSE SUPPRESSION BURST MODE OPERATION UNDER STANDBY CONDITIONS DESCRIPTION In a master slave architecture,the TEA2164Scontrol IC achieves the slave function. Primarily designed for TV receivers and monitors applications, this circuit provides an easy synchronization and smart solution for low power stand by operation. Located at the primary side the TEA2164S control IC ensures : - the power supply start-up - the power supply control under stand-by conditions - the process of the regulation signals sent by the master circuit located at the secondary side - direct base drive of the bipolar switching transistor - the protection of the transistor and the power supply under abnormal conditions. For more details, refer to application note AN409. PIN CONNECTIONS GROUND I COPY LONG OVERLOAD CAPACITOR SUBSTRATE SUBSTRATE PULSE INPUT OSCILLATOR TIMING RESISTOR OSCILLATOR TIMING CAPACITOR 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC SUPPLY VOLTAGE OUTPUT STAGE POSITIVE SUPPLY VOLTAGE OUTPUT (BASE CURRENT) SUBSTRATE SUBSTRATE IC(Max.) SENSE 2164S-01.EPS POWERDIP16 (Plastic Package) ORDER CODE : TEA2164S LOW FREQUENCY OSCILLATOR CAPACITOR FEEDBACK INPUT IN BURST MODE January 1998 1/16 TEA2164S BLOCK DIAGRAM R1 9 C1 10 Soft Start tON LIMITATION VLF OSCILLATOR Valid Sawtooth Return R Q 13% S IC(Max.) 11 12 IC(M3) IC(Max.) DETECTION IC(M2) IC(M1) 1 VCC 16V Internal VCC VCC MONITORING V13 OUT 14 V+ 15 VCC 16 TEA2164S 1 V+ + AMP & S Q IC COPY & 1 R Q DELAY AMP & Sawtooth Return RC OSCILLATOR SYNC Positive Pulse Negative Pulse R Q S VCC < 4.6V REPETITIVE OVERCURRENT PROTECTION V- SYNC SWITCH PULSE SHAPER 8 COSC 7 ROSC 6 IN 5 V- 4 3 C2 2 ICOPY 1 GND Figure 1 : Simplified Application Diagram VCC IN VOUT OUT TEA2164S SLAVE I.C. TEA5170 MASTER I.C. VREF PWM SYNC. INPUT 2/16 2164S-03.EPS 2164S-02.EPS TEA2164S ABSOLUTE MAXIMUM RATINGS Symbol VCC V+ V­ VCC - V­ V+ - V­ Iout+ Iou t­ Tj Tstg Parameter Positive Power Supply V16-V1 Positive Power Supply of the Output Stage V15-V1 Negative Power Supply V4, 5, 12, 13-V1 Total Power Supply V16-V4, 5, 12, 13 or V15-V4, 5, 12, 13 Positive Output Current Negative Output Current Junction Temperature Storage Temperature Value 18 18 ­5 20 1.5 2 150 ­ 40, + 150 Unit V V V V A °C °C 2164S-01.TBL 2164S-03.TBL 2164S-02.TBL A THERMAL DATA Symbol Rth(j-c) Parameter Junction Case Thermal Resistance Value 11 Unit °C/W MAXIMUM POWER DISSIPATION Ptot (W) 3.5 3.0 2.5 2.0 1.5 2164S-04.EPS 45°C/W 1.0 0.5 Tamb (°C) 0 50 100 RECOMMANDED OPERATING CONDITIONS Symbol VCC V­ VCC ­ V­ Iout+ Iou t­ Fsw Ro Co C1 C2 Vin Toper Positive Power Supply Negative Power Supply (see Figure 2) Total Power Supply Positive Outpu