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Philips TDA4663t free download

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Mfg:Philips
Model:TDA4663t 🔎
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Descr:Philips Quality Data Sheet
Group:Electronics > Components > Integrated circuits
Uploaded:21-07-2004
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File name Tda4663t.pdf

INTEGRATED CIRCUITS DATA SHEET TDA4663T Baseband delay line Product specification Supersedes data of September 1993 File under Integrated Circuits, IC02 1996 Nov 22 Philips Semiconductors Product specification Baseband delay line FEATURES · Two delay lines, using the switched-capacitor technique, for a delay time of one horizontal line (1H) minus 55 ns (64 µs - 55 ns) · Adjustment-free application · Handles negative or positive colour-difference input signals · Clamping of AC-coupled input signals [mostly colour-difference signals ±(R-Y) and ±(B-Y)] · VCO without external components · 3 MHz internal clock signal derived from a 6 MHz CCO, line-locked by the sandcastle pulse (64 µs line) · Sample-and-hold circuits and low-pass filters to suppress the 3 MHz clock signal · Output buffer amplifiers. QUICK REFERENCE DATA SYMBOL VP1 VP2 IP(tot) Vi(p-p) PARAMETER analog supply voltage (pin 9) digital supply voltage (pin 1) total supply current input signal PAL/NTSC (peak-to-peak value) ±(R-Y); pin 16 ±(B-Y); pin 14 Gv Vo gain ----- of colour-difference output signals for PAL and NTSC Vi V 11 -------V 16 V 12 -------V 14 ORDERING INFORMATION TYPE NUMBER TDA4663T PACKAGE NAME SO16 DESCRIPTION plastic small outline package; 16 leads; body width 3.9 mm -1 -1 0 - - 1.3 1.3 MIN. 4.75 4.75 - 5 5 5.9 TYP. GENERAL DESCRIPTION TDA4663T The TDA4663T is an integrated baseband delay line circuit with a delay time of one horizontal line (1H) minus 55 ns (64 µs - 55 ns). MAX. 5.25 5.25 7.0 - - V V UNIT mA V V +1 dB 0 +1 dB VERSION SOT109-1 1996 Nov 22 2 1996 Nov 22 clamping pulse 7 11 ±(R-Y) BLOCK DIAGRAM Philips Semiconductors Baseband delay line handbook, full pagewidth ±(R-Y) LP 16 LINE MEMORY SAMPLEAND-HOLD SIGNAL CLAMPING mostly colour-difference input signals pre-amplifiers output buffers 12 mostly colour-difference output signals ±(B-Y) LP 14 LINE MEMORY SAMPLEAND-HOLD SIGNAL CLAMPING ±(B-Y) 3 3 MHz shifting clock DIVIDER BY-192 VP1 FREQUENCY PHASE DETECTOR LP digital supply 1 GND2 VP2 6 MHz CCO DIVIDER BY-2 9 analog supply TDA4663T sandcastle pulse input 5 SANDCASTLE DETECTOR 2 6 13 15 n.c. n.c. n.c. n.c. 10 3 4, 8 MED800 GND1 Product specification TDA4663T Fig.1 Block diagram. Philips Semiconductors Product specification Baseband delay line PINNING SYMBOL VP2 n.c. GND2 i.c. SAND n.c. VCL i.c. VP1 GND1 Vo(R-Y) Vo(B-Y) n.c. Vi(B-Y) n.c. Vi(R-Y) PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DESCRIPTION supply voltage for digital part (+5 V) not connected ground for digital part (0 V) internally connected sandcastle pulse input not connected clamping pulse input internally connected supply voltage for analog part (+5 V) ground for analog part (0 V) ±(R-Y) output signal ±(B-Y) output signal not connected ±(B-Y) input signal not connected ±(R-Y) input signal i.c. 4 handbook, halfpage TDA4663T VP2 1 n.c. 2 GND2 3 16 Vi(R-Y) 15 n.c. 14 Vi(B-Y) 13 n.c. TDA4663T SAND 5 n.c. 6 VCL 7 i.c. 8 MED801 12 Vo(B-Y) 11 Vo(R-Y)

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