Philips TDA3567 free download

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INTEGRATED CIRCUITS DATA SHEET TDA3567 NTSC decoder Product specification File under Integrated Circuits, IC02 June 1986 Philips Semiconductors Product specification NTSC decoder GENERAL DESCRIPTION TDA3567 The TDA3567 is a monolithic integrated decoder for the NTSC colour television standards. It combines all functions required for the demodulation of NTSC signals. Further more it contains a luminance amplifier, an RGB-matrix and amplifier. These amplifiers supply output signals up to 5 V peak-to-peak (picture information) enabling direct drive of the discrete output stages. QUICK REFERENCE DATA PARAMETER Supply voltage Supply current Luminance input signal Input voltage (peak-to-peak value) Contrast control range Chrominance amplifier Input voltage (peak-to-peak value) Saturation control range RGB matrix and amplifiers Output voltage at nominal luminance input signal and nominal contrast (peak-to-peak value) Sandcastle input Blanking input voltage Burst gating and clamping input voltage PACKAGE OUTLINE 18-lead DIL; plastic, with internal heatspreader (SOT102-1); SOT102-1; 1996 November 25. V7-17(p-p) 6,5 7,0 7,5 V pin 7 V7-17 1,0 1,5 2,0 V V10,11,12-17(p-p) 4,0 5,0 6,0 V V3-17(p-p) - 50 550 - - - mV dB pin 3 V8-17(p-p) - - 0,45 20 - - V dB CONDITIONS pin 1 pin 1 pin 8 IP = I1 SYMBOL VP = V1-17 9 - MIN. TYP. 12 65 MAX. 13,2 - V mA UNIT June 1986 2 Philips Semiconductors Product specification NTSC decoder TDA3567 June 1986 3 Fig.1 Block diagram. Philips Semiconductors Product specification NTSC decoder FUNCTIONAL DESCRIPTION Luminance amplifier TDA3567 The luminance amplifier is voltage driven and requires an input signal of 450 mV peak-to-peak (1) The luminance delay line must be connected between the i.f. amplifier and the decoder. The input signal must be a.c. coupled to the input pin 8. The black level clamp circuit of the RGB amplifiers uses the coupling capacitor as a storage capacitor. After clamping the signal is fed to a peaking stage. The RC network connected to pin 13 is used to define the amount of overshoot. The peaking stage is followed by a contrast control stage. The control voltage has to be supplied to pin 6. The control voltage range is nominally -17 to + 3 dB. The linear curve of the contrast control voltage is shown in Fig.2. Chrominance amplifier The chrominance amplifier has an asymmetrical input. The input signal at pin 3 must be a.c. coupled, and must have an amplitude of 550 mV peak-to-peak. The gain control stage has a control range in excess of 30 dB, the maximum input signal should not exceed 1,1 V peak-to-peak, otherwise clipping of the input signal will occur. From the gain control stage the chrominance signal is fed to the saturation and contrast control stages. Chrominance and luminance control stages are directly coupled to obtain good tracking. The saturation is linearly controlled via pin 5. The control voltage range is 2 V to 4 V. The impedance is high and the saturation control range is i