Philips SAA5281 free download

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INTEGRATED CIRCUITS DATA SHEET SAA5281 Integrated Video input processor and Teletext decoder (IVT1.8*) Preliminary specification Supersedes data of June 1994 File under Integrated Circuits, IC02 1996 Nov 04 Philips Semiconductors Preliminary specification Integrated Video input processor and Teletext decoder (IVT1.8*) FEATURES · Complete Teletext and VPS decoding in a single package · Built-in 8K Ч 8 memory for up to 8 page storage · Enhanced mode allows 7 Fastext pages and 8 pages of TOP to be captured · Ability to request only subtitle pages · Acquisition and decoding of VPS data · Data valid output available to indicate reception of error-free VPS or packet 8/30/2 data · Software and hardware compatible with SAA5246 and SAA5248 · Meshing display within boxes · Separate data checking algorithms and pointers for each acquisition channel · 24 : 18 Hamming checker · Automatic packet 26 extension character processing · Indication of Line 23 for external use · 13.5 MHz clock output to drive external microcontroller · Detection of Spanish transmissions to disable flicker-stopper · Compatible with Philips' one-chip TV IC (TDA836X) for scan-locking applications. QUICK REFERENCE DATA SYMBOL VDD IDD Vsync Vvid(p-p) fxtal Tamb supply voltage supply current sync voltage amplitude video input voltage amplitude (peak-to-peak value) crystal frequency operating ambient temperature PARAMETER 4.5 - 0.1 0.7 - -20 MIN. 5.0 75 0.3 1.0 27 - TYP. DESCRIPTION SAA5281 The IVT1.8* is a single-chip Teletext decoder IC for decoding 625-line based World System Teletext transmissions. The device is based on IVT1.0VPS and has reception facilities for the 5 MHz biphase VPS signal. It is intended for use in video recorders, in particular to implement the VPT facility (VCR programming via Teletext). With suitable software both VPT standards (EBU PDC System A and System B) can be accommodated to allow operation from any European VPT transmission. Automatic processing of packet 26 transmissions is also possible. No external memory is required as an 8K Ч 8 DRAM is included on-chip for up to 8 page storage. An enhanced mode allows 7 Fastext pages to be stored, with one chapter used to store extension packets. MAX. 5.5 150 0.6 1.4 - +70 V UNIT mA V V MHz °C ORDERING INFORMATION PACKAGE TYPE NUMBER NAME SAA5281P SAA5281ZP SAA5281GP DIP48 SDIP52 QFP64 DESCRIPTION plastic shrink dual in-line package; 32 leads (400 mil) plastic shrink dual in-line package; 52 leads (600 mil) plastic quad flat package; 64 leads (lead length 1.95 mm); body 14 Ч 20 Ч 2.8 mm VERSION SOT240-1 SOT247-1 SOT319-2 1996 Nov 04 2 Philips Semiconductors Preliminary specification Integrated Video input processor and Teletext decoder (IVT1.8*) BLOCK DIAGRAM SAA5281 handbook, full pagewidth V DD1 VDD2 Y BLAN RGBREF COR R 22 19 20 18 15 G 16 B 17 DRAM REFRESH AND TIMING 1 10 POWER-ON RESET DISPLAY 8K x 8 DRAM ODD/EVEN (or DV) 21 24 TO 18 HAMMING DECODER PACKET 26 PROCESSING ENGINE MEMOR