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The OtS Processor Principles of Operation REVIEW DRAFT - COMMENTS PLEASE April 9, 1977 Version 2.0 This document describes the interior architecture of the OIS System Element Oigitai Processor. It includes a description of the virtual storage system, the in'struction set, and the input-output facilities. r- Table of Contents In trod uction iki.:2""bi Information f ormatsbyntactie conventions Number system Special Characters z Terms 2 Virtual Storage Introduction Mesa's Use of the Virtual Memory System Address Translation Requests Operations on the Map Mapping Examples Poi n t er Formats Central Processor Data Structures and Associated Registers 9 Code Segments 9 Global Frames 10 Local Frames 10 System Dispatch 10 Global Frame Table 10 Allocation Vector 10 I The Processor Stack 11 The Machine State 12 I L Insmction Forniat and Classes Load /S tore Instructions 14 Load/Store Gt ohal Word 15 Load/Store Local Word 16 Load Immediate . 17 L-oad/ St o re GIo bal DoubleVJo rd 18 Load/Store Local Doubleword 18 Read/Wri te Word 19 Read/W rite Doubleword 21 Read/Wri te Indexed 23 Read/Write Indirect 24 r- 26 Id Rec?d/\Nrite String Read/Write Field 27 f --- i Data Modification Instructions - 30 Jump Instructions 36 Unconditional Jumps 36 Conditionai Jumps 36 Jump Indexed ByteIWord 41 i FOR Loop Control lnstructions Miscellaneous lnstructions Bit Boundary Block Transfer 42 43 48 Display Bitmap Format 48 Font Format 48 BitBLT 49 BitBLT Exam