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Application Note 103 6x86MX BIOS WRITER'S GUIDE Table of Contents 1.0 1.1 1.2 1.3 2.0 3.0 3.1 3.2 3.3 3.4 3.5 4.0 4.1 4.2 4.3 4.4 4.5 5.0 5.1 5.2 5.3 6.0 6.1 6.2 6.3 6.4 6.5 Introduction Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Cyrix Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Summary of 6x86MX and 6x86 Differences . . . . . . . . . . . . . . . . . . . . . 6 Cache Unit Cyrix 6x86MX CPU Detection Detecting the Cyrix 6x86MX - Method 1 . . . . . . . . . . . . . . . . . . . . . . . 8 Detecting the Cyrix 6x86MX - Method 2 . . . . . . . . . . . . . . . . . . . . . . 10 EDX Value Following Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Determining 6x86MX Operating Frequency . . . . . . . . . . . . . . . . . . . . 13 Device Name . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6x86MX Configuration Register Index Assignments Accessing a Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6x86MX Configuration Register Index Assignments . . . . . . . . . . . . . 15 Configuration Control Registers (CCR0-6) . . . . . . . . . . . . . . . . . . . . . 17 Address Region Registers (ARR0-7) . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Region Control Registers (RCR0-7) . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Recommended 6x86MX Configuration Register Settings PC Memory Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 General Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Recommended Bit Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Model Specific Registers Time Stamp Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Performance Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Performance Monitoring Counters 1 and 2 . . . . . . . . . . . . . . . . . . . . . 44 Counter Event Counter Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 PM Pin Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 2 Cyrix 6x86MX Application Note 103 - BIOS WRITER'S GUIDE 7.0 7.1 7.2 7.3 7.4 Programming Model Differences Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Configuring Internal 6x86MX Features . . . . . . . . . . . . . . . . . . . . . . . 50 INVD and WBINVD Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Control Register 0 (CR0) CD and NW Bits . . . . . . . . . . . . . . . . . . . . 51 Appendixes Appendix A -Sample Code: Detecting a Cyrix CPU . . . . . . . . . . . . . . . . . . . 52 Appendix B -Sample Code: Determining CPU MHz . . . . . . . . . . . . . . . . . . . 54 Appendix C -Example CPU Type and Frequency Detection Program .