Motorola 4568 free download

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Phase Comparator and Programmable Counters The MC14568B consists of a phase comparator, a divide­by­4, 16, 64 or 100 counter and a programmable divide­by­N 4­bit binary counter (all positive­edge triggered) constructed with MOS P­channel and N­channel enhancement mode devices (complementary MOS) in a monolithic structure. The MC14568B has been designed for use in conjunction with a programmable divide­by­N counter for frequency synthesizers and phase­ locked loop applications requiring low power dissipation and/or high noise immunity. This device can be used with both counters cascaded and the output of the second counter connected to the phase comparator (CTL high), or used independently of the programmable divide­by­N counter, for example cascaded with a MC14569B, MC14522B or MC14526B (CTL low). · Supply Voltage Range = 3.0 to 18 V · Capable of Driving Two Low­Power TTL Loads, One Low­Power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range. · Chip Complexity: 549 FETs or 137 Equivalent Gates MAXIMUM RATINGS* (Voltages referenced to VSS) Rating Symbol VDD Vin Iin PD TA Tstg DC Supply Voltage Value MC14568B L SUFFIX CERAMIC CASE 620 P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B ORDERING INFORMATION MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC ООООООООООООООООООООО ООООООООООООООООООООО ООООООООООООООООООООО Unit Vdc Vdc ­ 0.5 to + 18 ± 10 500 ­ 55 to + 125 ­ 65 to + 150 Input Voltage, All Inputs ­ 0.5 to VDD + 0.5 DC Input Current, per Pin Power Dissipation, per Package Operating Temperature Range Storage Temperature Range mAdc mW TA = ­ 55° to 125°C for all packages. TRUTH TABLE F Pin 10 0 0 1 1 G Pin 11 0 1 0 1 Division Ratio of Counter D1 4 16 64 100 _C _C * Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic "P and D/DW" Packages: ­ 7.0 mW/_C From 65_C To 125_C Ceramic "L" Packages: ­ 12 mW/_C From 100_C To 125_C The divide by zero state on the programmable divide­by­N 4­bit binary counter, D2, is illegal. BLOCK DIAGRAM PCin 14 (REF.) B TG TG C1 9 COUNTER D1 10 F CTL 15 TG "0" 3 PE 2 DP3 4­BIT PROGRAMMABLE COUNTER D2 DP0 1 Q1/C2 D2 "0" VDD = PIN 16 VSS = PIN 8 REV 3 1/94 A PHASE COMPARATOR 13 PCout 12 LD CTL HIGH 11 G PCin P/C C1 D1 C1 PCout LD PCin CTL LOW PCout P/C LD D1 "0" Q1/C2 D2 Q1/C2 4 5 6 DP2 DP1 7 ©MOTOROLA CMOS LOGIC DATA Motorola, Inc. 1995 MC14568B 1 ОООООООООООООООООООООООООООООООООО ОООООООООООООООООООООООООООООООООО ОООООООООООООООООООООООООООООООООО ОООООООООООООООООООООООООООООООООО ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Characteristic Symbol VOL VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 VIH 5.0 10 15 IOH Source 5.0 5.0 10 15 IOL 5.0 10 15 15 -- 5.0 10 15 5.0 10 15 ­ 1.2 ­ 0.25 ­ 0.62 ­ 1.8 0.64 1.6 4.2 -- -- -- -- -- -- -- -- -- -- -- -- ± 0.1 -- 5.0 10 20 ­ 1.0 ­ 0.2 ­ 0.5 ­ 1.5 0.51 1.3 3.4 -- -- -- -- -- ­ 1.7 ­ 0.36 ­ 0.9 ­ 3.5 0.88 2.25 8.8 ± 0.00001 5.0 0.00