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INTEGRATED CIRCUITS DATA SHEET TDA4661 Baseband delay line Product specification Supersedes data of April 1993 File under Integrated Circuits, IC02 December 1994 Philips Semiconductors Philips Semiconductors Product specification Baseband delay line FEATURES · Two comb filters, using the switched-capacitor technique, for one line delay time (64 µs) · Adjustment-free application · No crosstalk between SECAM colour carriers (diaphoty) · Handles negative or positive colour-difference input signals · Clamping of AC-coupled input signals (±(R-Y) and ±(B-Y)) · VCO without external components · 3 MHz internal clock signal derived from a 6 MHz CCO, line-locked by the sandcastle pulse (64 µs line) · Sample-and-hold circuits and low-pass filters to suppress the 3 MHz clock signal · Addition of delayed and non-delayed output signals · Output buffer amplifiers · Comb filtering functions for NTSC colour-difference signals to suppress cross-colour. QUICK REFERENCE DATA SYMBOL VP1 VP2 IP(tot) VI PARAMETER analog supply voltage (pin 9) digital supply voltage (pin 1) total supply current MIN. 4.5 4.5 - 5 5 4.9 525 665 1.05 1.33 5.8 5.8 -0.1 -0.1 TYP. 6 6 GENERAL DESCRIPTION TDA4661 The TDA4661 is an integrated baseband delay line circuit with one line delay. It is suitable for decoders with colour-difference signal outputs ±(R-Y) and ±(B-Y). MAX. V V UNIT 7.0 - - - - 6.3 6.3 +0.4 +0.4 mA mV mV V V dB dB dB dB ±(R-Y) input signal PAL/NTSC (peak-to-peak value; pin 16) - ±(B-Y) input signal PAL/NTSC (peak-to-peak value; pin 14) - ±(R-Y) input signal SECAM (peak-to-peak value; pin 16) ±(B-Y) input signal SECAM (peak-to-peak value; pin 14) - - 5.3 5.3 -0.6 -0.6 Gv gain VO / VI of colour-difference output signals V11 / V16 for PAL and NTSC V12 / V14 for PAL and NTSC V11 / V16 for SECAM V12 / V14 for SECAM ORDERING INFORMATION TYPE NUMBER TDA4661 TDA4661T PACKAGE NAME DIP16 SO16 DESCRIPTION plastic dual in-line package; 16 leads (300 mil) long body plastic small outline package; 16 leads; body width 3.9 mm VERSION SOT38-4 SOT109-1 December 1994 2 December 1994 BLOCK DIAGRAM Philips Semiconductors Baseband delay line ±(R­Y) 11 LINE MEMORY LP pre-amplifiers addition stages output buffers colour- difference output signals SAMPLEANDHOLD 16 SIGNAL CLAMPING ±(R­Y) colour-difference input signals ±(B­Y) LINE MEMORY LP 14 SIGNAL CLAMPING 12 SAMPLEANDHOLD ±(B­Y) 3 3 MHz shifting clock FREQUENCY PHASE DETECTOR DIVIDER BY 192 LP digital supply 1 6 MHz CCO DIVIDER BY 2 VP2 GND2 V P1 9 analog supply n.c. 2 6 13 15 n.c. n.c. n.c. TDA4661 5 sandcastle pulse input SANDCASTLE DETECTOR 7 i.c. 10 3 4, 8 GND1 MEH182.2 Product specification TDA4661 Fig.1 Block diagram. Philips Semiconductors Product specification Baseband delay line PINNING SYMBOL VP2 n.c. GND2 i.c. SAND n.c. i.c. i.c. VP1 GND1 VO(R-Y) VO(B-Y) n.c. VI(B-Y) n.c. VI(R-Y) PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DESCRIPTION +5 V supply voltage for digital part not connecte