Philips TDA4820t free download

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INTEGRATED CIRCUITS DATA SHEET TDA4820T Sync separation circuit for video applications Preliminary specification File under Integrated Circuits, IC02 June 1990 Philips Semiconductors Preliminary specification Sync separation circuit for video applications FEATURES · Fully integrated, few external components · Positive video input signal, capacitively coupled · Operates with non-standard video input signals · Black level clamping · Generation of composite sync slicing level at 50% of peak sync voltage · Vertical sync separator with double slope integrator · Delay time of the vertical output pulse is determined by an external resistor · Vertical sync generation with a slicing level at 40% of peak sync voltage · Output stage for composite sync · Output stage for vertical sync GENERAL DESCRIPTION TDA4820T The TDA4820T is a monolithic integrated circuit including a horizontal and a vertical sync separator, offering composite sync and vertical sync extracted from the video signal. QUICK REFERENCE DATA SYMBOL VP IP V2(p-p) Vsync(p-p) Vo Vo Vo Tamb PARAMETER supply voltage range (pin 1) supply current (pin 1) input voltage amplitude (peak-to-peak value) sync pulse input voltage amplitude (pin 2) (peak-to-peak value) maximum vertical sync output voltage (pin 6) maximum composite sync output voltage (pin 7) minimum output voltage (pins 6 and 7) operating ambient temperature range I6 = -1 mA I7 = -3 mA I6,7 = 1 mA CONDITIONS - 0.2 50 10.0 10.0 - 0 MIN. 10.8 8 1 300 - - - - TYP. 12 MAX. 13.2 12 3 500 - - 0.6 + 70 UNIT V mA V mV V V V °C ORDERING AND PACKAGE INFORMATION EXTENDED TYPE NUMBER TDA4820T Note 1. SOT96-1; 1997 January 08. PACKAGE PINS 8 PIN POSITION mini-pack MATERIAL plastic CODE SO8; SOT96A (1) June 1990 2 Philips Semiconductors Preliminary specification Sync separation circuit for video applications TDA4820T Fig.1 Block diagram and application circuit. PINNING SYMBOL VP VCVBS SLEV VDEL n.c. VSYN CSYN GND PIN 1 2 3 4 5 6 7 8 DESCRIPTION supply voltage video input signal slicing level vertical integration delay time not connected vertical sync output signal composite sync output signal ground PIN CONFIGURATION Fig.2 Pin configuration. June 1990 3 Philips Semiconductors Preliminary specification Sync separation circuit for video applications FUNCTIONAL DESCRIPTION The complete circuit consists of the following functional blocks as shown in Fig.1: ­ Video amplifier and black level clamping ­ 50% peak sync voltage ­ Composite sync slicing ­ Vertical slicing and double slope integrator ­ Vertical sync output ­ Composite sync output Video amplifier and black level clamping (pin 2) The sync separation circuit TDA4820T is designed for positive video input signals. The video signal (supplied via capacitor C2 at pin 2) is amplified by approximately 15 in the input amplifier. The black level clamping voltage (approximately 2 V) is stored by capacitor C2. 50% peak sync voltage (pin 3) From the black level and the peak sync voltage, th