File information: | |
File name: | CA3162.pdf [preview ca3162] |
Size: | 138 kB |
Extension: | |
Mfg: | intersil |
Model: | ca3162 🔎 |
Original: | |
Descr: | conversor A/D para display de 3 segmentos.(par casado com ca3161) |
Group: | Electronics > Components > Integrated circuits |
Uploaded: | 01-08-2004 |
User: | jcrom |
Multipart: | No multipart |
Information about the files in archive: | ||
Decompress result: | OK | |
Extracted files: | 1 | |
File name CA3162.pdf Semiconductor CA3162, CA3162A A/D Converters for 3-Digit Display Description The CA3162E and CA3162AE are I2L monolithic A/D converters that provide a 3 digit multiplexed BCD output. They are used with the CA3161E BCD-to-Seven-Segment Decoder/Driver and a minimum of external parts to implement a complete 3-digit display. The CA3162AE is identical to the CA3162E except for an extended operating temperature range. The CA3161E is described in the Display Drivers section of this data book. August 1997 Features · Dual Slope A/D Conversion · Multiplexed BCD Display · Ultra Stable Internal Band Gap Voltage Reference · Capable of Reading 99mV Below Ground with Single Supply · Differential Input · Internal Timing - No External Clock Required · Choice of Low Speed (4Hz) or High Speed (96Hz) Conversion Rate · "Hold" Inhibits Conversion but Maintains Delay · Overrange Indication - "EEE" for Reading Greater than +999mV, "-" for Reading More Negative than -99mV When Used With CA3161E · Extended Temperature Range Version Available Ordering Information PART NUMBER CA3162E CA3162AE TEMP. RANGE (oC) 0 to 70 -40 to 85 PACKAGE 16 Ld PDIP 16 Ld PDIP PKG. NO. E16.3 E16.3 Pinout CA3162 (PDIP) TOP VIEW BCD OUTPUTS 21 20 NSD 1 2 3 4 5 6 7 8 16 23 15 22 14 V+ BCD OUTPUTS DIGIT SELECT OUTPUTS MSD LSD 13 GAIN ADJ 12 INTEGRATING CAP HOLD/ BYPASS GND ZERO ADJ 11 HIGH INPUT 10 LOW INPUT 9 ZERO ADJ CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1997 File Number 1080.2 3-5 CA3162, CA3162A Functional Block Diagram V+ ZERO ADJ 8 9 V+ BCD OUTPUTS INTEGRATING CAP 12 21 1 20 2 22 15 23 16 V+ 14 3 CONTROL LOGIC COUNTERS AND MULTIPLEX DIGIT DRIVE 4 5 4 THRESHOLD DET. 5 = MSD = LSD = NSD DIGIT SELECT OUTPUTS HIGH INPUT 11 LOW INPUT 10 V/I CONVERTER ÷2048 ÷96 3 REFERENCE CURRENT GENERATOR BAND GAP REFERENCE OSC HOLD/ BYPASS GATES 6 CONVERSION CONTROL 13 7 GND MSD = MOST SIGNIFICANT DIGIT NSD = NEXT SIGNIFICANT DIGIT LSD = LEAST SIGNIFICANT DIGIT GAIN ADJ 3-6 CA3162, CA3162A Absolute Maximum Ratings DC Supply Voltage (Between Pins 7 and 14) . . . . . . . . . . . . . . . +7V Input Voltage (Pin 10 or 11 to Ground). . . . . . . . . . . . . . . . . . . ±15V Thermal Information Thermal Resistance (Typical, Note 1) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC Operating Conditions Temperature Range CA3162E. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 75oC CA3162AE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress |
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