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File name: | tda7313.pdf [preview ] |
Size: | 131 kB |
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Mfg: | ST |
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Original: | TDA7313-ST 🔎 |
Descr: | DIGITAL AUDIO PROC+LOUDNE DIP28 |
Group: | Electronics > Components > Integrated circuits |
Uploaded: | 09-03-2004 |
User: | plamensl |
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File name tda7313.pdf ® TDA7313 DIGITAL CONTROLLED STEREO AUDIO PROCESSOR WITH LOUDNESS INPUT MULTIPLEXER: - 3 STEREO INPUTS - SELECTABLE INPUT GAIN FOR OPTIMAL ADAPTION TO DIFFERENT SOURCES INPUT AND OUTPUT FOR EXTERNAL EQUALIZER OR NOISE REDUCTION SYSTEM LOUDNESS FUNCTION VOLUME CONTROL IN 1.25dB STEPS TREBLE AND BASS CONTROL FOUR SPEAKER ATTENUATORS: - 4 INDEPENDENT SPEAKERS CONTROL IN 1.25dB STEPS FOR BALANCE AND FADER FACILITIES - INDEPENDENT MUTE FUNCTION ALL FUNCTIONS PROGRAMMABLE VIA SERIAL I2C BUS DESCRIPTION The TDA7313 is a volume, tone (bass and treble) balance (Left/Right) and fader (front/rear) processor for quality audio applications in car radio and Hi-Fi PIN CONNECTION (Top view) DIP28 SO28 ORDERING NUMBERS: TDA7313 TDA7313D systems. Selectable input gain and external loudness function are provided. Control is accomplished by serial I2C bus microprocessor interface. The AC signal setting is obtained by resistor networks andswitches combined with operationalamplifiers. Thanks to the used BIPOLAR/CMOS Tecnology, Low Distortion, Low Noise and Low DC stepping are obtained. November 1999 1/14 TDA7313 TEST CIRCUIT THERMAL DATA Symbol R th j-pins Description Thermal Resistance Junction-pins max SO28 85 DIP28 65 Unit °C/W ABSOLUTE MAXIMUM RATINGS Symbol VS T amb Tstg Operating Supply Voltage Operating Ambient Temperature Storage Temperature Range Parameter Value 10.2 -40 to 85 -55 to +150 Unit V °C °C QUICK REFERENCE DATA Symbol VS VCL THD S/N SC Supply Voltage Max. input signal handling Total Harmonic Distortion V = 1Vrms f = 1KHz Signal to Noise Ratio Channel Separation f = 1KHz Volume Control 1.25dB step 2db step 1.25dB step -78.75 -14 -38.75 0 100 Bass and Treble Control Input Gain 3.75dB step Parameter Min. 6 2 0.01 106 103 0 +14 0 11.25 0.1 Typ. 9 Max. 10 Unit V Vrms % dB dB dB dB dB dB dB Fader and Balance Control Mute Attenuation 2/14 5.6K R2 C9 2.2µF C17 2.7nF BLOCK DIAGRAM OUT(L) BOUT(L) 18 SPKR ATT 25 MUTE OUT LEFT FRONT 4 17 16 12 19 IN(L) C11 100nF 100nF C14 LOUD(L) 100nF C15 BIN(L) TREBLE(L) RB 3x 2.2µF C1 L1 SPKR ATT 23 MUTE 15 L1 VOL + LOUD BASS TREBLE LEFT INPUTS C2 L2 14 L2 C3 L3 13 L3 OUT LEFT REAR 28 SERIAL BUS DECODER + LATCHES 27 26 SCL SDA DIGGND BUS INPUT SELECTOR + GAIN C4 R3 9 R3 VOL + LOUD BASS TREBLE SPKR ATT 24 MUTE OUT RIGHT FRONT RIGHT INPUTS C5 R2 10 R2 C6 R1 11 R1 3x 2.2µF SPKR ATT RB MUTE 1 CREF C7 C8 2.2µF 22µF OUT(R) IN(R) 7 8 6 21 LOUD(R) 100nF C12 100nF C10 5.6K R1 20 BOUT(R) BIN(R) 100nF C13 2.7nF C16 5 TREBLE(R) D94AU180 22 SUPPLY 3 OUT RIGHT REAR 2 VCC AGND TDA7313 3/14 TDA7313 ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25°C, VS = 9V, RL = 10K, RG = 600, all controls flat (G = 0), f = 1KHz unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit SUPPLY VS IS SVR Supply Voltage Supply Current Ripple Rejection 60 6 9 8 80 10 11 V mA dB INPUT SELECTORS R II V CL SIN RL GINmin GINmax GSTEP eIN VDC Input Resistance Clipp |
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