SGS-Thomson M27C1001 free download

File name M27C1001.pdf

M27C1001 1 Megabit (128K x 8) UV EPROM and OTP ROM VERY FAST ACCESS TIME: 45ns COMPATIBLE with HIGH SPEED MICROPROCESSORS, ZERO WAIT STATE LOW POWER "CMOS" CONSUMPTION: ­ Active Current 30mA ­ Standby Current 100µA PROGRAMMING VOLTAGE: 12.75V ELECTRONIC SIGNATURE for AUTOMATED PROGRAMMING PROGRAMMING TIMES of AROUND 12sec. (PRESTO II ALGORITHM) 28 1 FDIP32W (F) LCCC32W (L) DESCRIPTION The M27C1001 is a high speed 1 Megabit UV erasable and electrically programmable memory EPROM ideally suited for microprocessor systems requiring large programs. It is organized as 131,072 by 8 bits. The 32 pin Window Ceramic Frit-Seal Dual-in-Line and Leadless Chip Carrier packages have transparent lids which allow the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C1001 is offered in both Plastic Dual-in-Line, Plastic Leaded Chip Carrier and Plastic Thin Small Outline packages. Table 1. Signal Names A0 - A16 Q0 - Q7 E G P VPP VCC VSS Address Inputs Data Outputs Chip Enable Output Enable Program Program Supply Supply Voltage Ground PLCC32 (C) TSOP32 (N) 8 x 20mm Figure 1. Logic Diagram VCC VPP 17 A0-A16 8 Q0-Q7 P E G M27C1001 VSS AI00710B May 1995 1/15 M27C1001 Figure 2A. DIP Pin Connections VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS 1 32 2 31 3 30 4 29 5 28 6 27 7 26 8 25 M27C1001 9 24 10 23 11 22 12 21 13 20 14 19 15 18 16 17 AI00711 Figure 2B. LCC Pin Connections VCC P NC A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3 A12 A15 A16 VPP VCC P NC 1 32 A7 A6 A5 A4 A3 A2 A1 A0 Q0 A14 A13 A8 A9 A11 G A10 E Q7 9 M27C1001 25 17 VSS Q3 Q4 Q5 Q6 AI00712 Warning: NC = Not Connected. Warning: NC = Not Connected. Figure 2C. TSOP Pin Connections A11 A9 A8 A13 A14 NC P VCC VPP A16 A15 A12 A7 A6 A5 A4 1 32 G A10 E Q7 Q6 Q5 Q4 Q3 VSS Q2 Q1 Q0 A0 A1 A2 A3 Read Mode The M27C1001 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M27C1001 has a standby mode which reduces the active current from 30mA to 100µA. The M27C1001 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input. Two Line Output Control 8 9 M27C1001 (Normal) 25 24 16 17 AI01151B Warning: NC = Not Connected.